Creating inductors, resistors, capacitors and other structures in printed circuit board vias with light pipe technology

Patent metadata

Field	Value
Publication number	US-10834828-B2
Application number	US-201815881205-A
Country	US
Kind code	B2
Filing date	Jan 26, 2018
Priority date	Jan 26, 2018
Publication date	Nov 10, 2020
Grant date	Nov 10, 2020

Abstract

A method for forming passive electrical devices that includes depositing a photo reactive layer over a sidewall of a via that extends through a printed circuit board; inserting a light pipe having a mask configured to provide a passive electronic device geometry within the via to an entire depth of the via; and exposing the photo reactive layer to radiation provided by the light pipe to provide a pattern having the passive electronic device geometry on the sidewall of the via.

First claim

The invention claimed is:

1. A method for forming a passive electrical device comprising:
depositing a photo reactive layer over a sidewall of a via that extends through a printed circuit board;
inserting a light pipe having a mask, the mask configured to provide a passive electrical device geometry, within the via to an entire depth of the via; and
exposing the photo reactive layer to radiation provided by the light pipe to provide a pattern having said passive electrical device geometry on the sidewall of the via.

2. The method of claim 1 , wherein an electrically conductive material is present on the sidewall of the via prior to depositing the photo reactive layer over the sidewall of the via, and exposing the photo reactive layer provides a first etch mask having passive electrical device geometry that exposes portions of the electrically conductive material that is to be removed.

3. The method of claim 2 , further comprising etching the portions of the electrically conductive material exposed by the first etch mask, wherein remaining portions of the electrically conductive material provides the conductive feature of the passive electrical device within the via.

4. The method of claim 3 , wherein the mask on the light pipe has a first coil geometry that extends along an entire length of the light pipe that is inserted into the entire depth of the via, wherein the passive electrical device has a first coil inductor structure defined by the geometry provided by the mask of the light pipe.

5. The method of claim 4 , further comprising depositing a first dielectric fill in the via after forming the first coil inductor structure.

6. The method of claim 5 , further comprising forming a ferromagnetic core in the dielectric fill substantially centrally positioned in the first coil inductor structure.

7. The method of claim 5 , further comprising:
forming an opening in the first dielectric fill;
forming an electrically conductive layer on a sidewall of the first dielectric fill;
forming a photoresist layer on the electrically conductive layer;
inserting a masked light pipe within the opening, the masked light pipe exposing the photoresist layer to a radiation that patterns the photoresist mask to a second etch mask having a geometry of a second coil geometry; and
etching the portions of the electrically conductive layer exposed by the second etch mask, wherein remaining portions of the electrically conductive layer provides the second coil structure of the passive electrical device within the via.

8. The method of claim 3 , wherein said etching the portions of the electrically conductive material exposed by the first etch mask provides remaining portions of the electrically conductive material that provides two separate electrically conductive electrodes on substantially opposing sidewalls of the via.

9. The method of claim 8 , further comprising forming a resistive element filling a remaining opening between said two separate electrically conductive electrodes to provide that said passive electrical device is a resistor.

10. The method of claim 8 , further comprising forming a node dielectric filling a remaining opening between two separate electrically conductive electrodes to provide that said passive electrical device is a capacitor.

11. The method of claim 1 , further comprising forming an electrode on opposing sides of the via, wherein each electrode is in electrical communication with an electrically conductive feature of the passive electrical device that is present with the via.

12. A method for forming a passive electrical device comprising:
depositing a photo reactive layer over a sidewall of a via that extends through a printed circuit board;
inserting a light pipe having a mask, the mask configured to provide a passive electrical device geometry within the via to an entire depth of the via, wherein the mask on the light pipe has a first coil geometry that extends along an entire length of the light pipe that is inserted into the entire depth of the via; and
exposing the photo reactive layer to radiation provided by the light pipe to provide a pattern having said passive electrical device geometry on the sidewall of the via, wherein the passive electrical device has a first coil inductor structure defined by the geometry provided by the mask of the light pipe; and
depositing a first dielectric fill in the via after forming the first coil inductor structure.

13. The method of claim 12 , wherein an electrically conductive material is present on the sidewall of the via prior to depositing the photo reactive layer over the sidewall of the via, and exposing the photo reactive layer provides a first etch mask having passive electrical device geometry that exposes portions of the electrically conductive material that is to be removed.

14. The method of claim 13 , further comprising etching the portions of the electrically conductive material exposed by the first etch mask, wherein remaining portions of the electrically conductive material provides the conductive feature of the passive electrical device within the via.

15. The method of claim 12 , further comprising forming a ferromagnetic core in the dielectric fill substantially centrally positioned in the first coil inductor structure.

16. The method of claim 12 , further comprising:
forming an opening in the first dielectric fill;
forming an electrically conductive layer on a sidewall of the first dielectric fill;
forming a photoresist layer on the electrically conductive layer;
inserting a masked light pipe within the opening, the masked light pipe exposing the photoresist layer to a radiation that patterns the photoresist mask to a second etch mask having a geometry of a second coil geometry; and
etching the portions of the electrically conductive layer exposed by the second etch mask, wherein remaining portions of the electrically conductive layer provides the second coil structure of the passive electrical device within the via.

17. A method for forming a passive electrical device comprising:
forming conductive material over a sidewall of a via that extends through a printed circuit board;
depositing a photo reactive layer over the conductive material along the sidewall of the via;
inserting a light pipe having a mask, the mask configured to provide a passive electrical device geometry, within the via; and
exposing the photo reactive layer to radiation passed through the light pipe to create a pattern having said passive electrical device geometry defined by the mask of the light pipe on the sidewall of the via.

18. The method of claim 17 , wherein exposing the photo reactive layer provides a first etch mask having passive electrical device geometry that exposes portions of the electrically conductive material that is to be removed, further comprising removing portions of the electrically conductive material.

19. The method of claim 18 , wherein removing portions of the electrically conductive material comprises etching the portions of the electrically conductive material exposed by the first etch mask, wherein remaining portions of the electrically conductive material provide the conductive feature of the passive electrical device within the via.

20. The method of claim 17 , wherein the mask on the light pipe has a first coil geometry that extends along an entire length of the light pipe that is inserted into the entire depth of the via, wherein the passive electrical device has a first coil inductor structure defined by the geometry provide

Assignees

• IBM

Inventors

• Bartley Gerald
• Becker Darryl
• Doyle Matthew
• Jeanson Mark

Classifications

• H01B1/02 Primary

  mainly consisting of metals or alloys · CPC title

• H05K3/301 Primary

  by means of a mounting structure (H05K3/325 takes precedence) · CPC title

• H05K2201/09645

  Patterning on via walls; Plural lands around one hole · CPC title

• H05K3/42

  Plated through-holes {or plated via connections} · CPC title

• G03F1/62

  Pellicles, e.g. pellicle assemblies, e.g. having membrane on support frame; Preparation thereof · CPC title