Gate on-state voltage supply unit, gate on-state voltage supply method, display driving module and display device

Patent metadata

Field	Value
Publication number	US-10832628-B2
Application number	US-201916410373-A
Country	US
Kind code	B2
Filing date	May 13, 2019
Priority date	Jul 3, 2018
Publication date	Nov 10, 2020
Grant date	Nov 10, 2020

Abstract

The present disclosure provides a gate on-state voltage supply unit, a gate on-state voltage supply method, a display driving module and a display device. The gate on-state voltage supply unit is used in the display device including a display driving module. The gate on-state voltage supply unit includes a shutdown determination module and a voltage supply module. The shutdown determination module is configured to determine whether the display device has been shut down, and when the display device has been shut down, transmit a boosting control signal to the voltage supply module. The voltage supply module is configured to, upon the receipt of the boosting control signal, boost a gate on-state voltage to acquire a boosted gate on-state voltage, and apply the boosted gate on-state voltage to a gate driving circuit of the display driving module.

First claim

What is claimed is:

1. A gate on-state voltage supply unit for use in a display device comprising a display driving module, the gate on-state voltage supply unit comprising a shutdown determination module and a voltage supply module, wherein the shutdown determination module is configured to determine whether the display device has been shut down, and when the display device has been shut down, transmit a boosting control signal to the voltage supply module; the voltage supply module is configured to, upon the receipt of the boosting control signal, boost a gate on-state voltage to acquire a boosted gate on-state voltage, and apply the boosted gate on-state voltage to a gate driving circuit of the display driving module; and wherein the shutdown determination module comprises a voltage detection sub-module, a first comparator, a second comparator, a phase inverter and an AND gate; the voltage detection sub-module is configured to detect the core voltage at a regular interval; a positive phase input end of the first comparator is configured to receive an n.sup.th core voltage detected by the voltage detection sub-module for the n.sup.th time, a negative phase input end of the first comparator is configured to receive a threshold core voltage, and an output end of the first comparator is connected to a first input end of the AND gate; the first comparator is configured to output a high level signal when the n.sup.th core voltage is greater than the threshold core voltage, and output a low level signal when the n.sup.th core voltage is smaller than the threshold core voltage, where n is a positive integer; a positive phase input end of the second comparator is configured to receive an (n+1).sup.th core voltage detected by the voltage detection sub-module for the (n+1).sup.th time, a negative phase input end of the second comparator is configured to receive the threshold core voltage, and an output end of the second comparator is connected to an input end of the phase inverter; the second comparator is configured to output a high level signal when the (n+.sup.1).sup.th core voltage is greater than the threshold core voltage, and output a low level signal when the (n+1).sup.th core voltage is smaller than the threshold core voltage; an output end of the phase inverter is connected to a second input end of the AND gate; the phase inverter is configured to output a low level signal when the input end of the phase inverter has received a high level signal, and output a high level signal when the input end of the phase inverter has received a low level signal; and the AND gate is configured to output the boosting control signal via the output end of the AND gate when the first input end and the second input end of the AND gate have received a high level signal, and output a maintenance control signal via the output end of the AND gate when the first input end and/or the second input end of the AND gate have received a low level signal.

2. The gate on-state voltage supply unit according to claim 1 , wherein the shutdown determination module is configured to determine that the display device has been shut down when a core voltage is at a falling edge, and transmit the boosting control signal to the voltage supply module, and the core voltage is a voltage applied by a power source management integrated circuit of the display driving module to a timing controller of the display driving module.

3. The gate on-state voltage supply unit according to claim 1 , wherein the voltage supply module further comprises a boosting sub-module, an Enable end of which is connected to the output end of the AND gate; the boosting sub-module is configured to, upon the receipt of the boosting control signal via the Enable end, boost the gate on-state voltage from the power source management integrated circuit to acquire the boosted gate on-state voltage, and apply the boosted gate on-state voltage to the gate driving circuit; and the boosting sub-module is further configured to, upon the receipt of the maintenance control signal via the Enable end, directly apply the gate on-state voltage from the power source management integrated circuit to the gate driving circuit.

4. A gate on-state voltage supply method for using the gate on-state voltage supply unit according to claim 1 , comprising:
determining, by the shutdown determination module, whether a display device has been shut down, and applying a boosting control signal to a voltage supply module when the display device has been shut down; and
upon the receipt of the boosting control signal, boosting, by the voltage supply module, a gate on-state voltage to acquire a boosted gate on-state voltage, and applying the boosted gate on-state voltage to a gate driving circuit of a display driving module.

5. The gate on-state voltage supply method according to claim 4 , wherein the determining, by the shutdown determination module, whether the display device has been shut down and applying the boosting control signal to the voltage supply module when the display device has been shut down comprises:
when a core voltage is at a falling edge, determining, by the shutdown determination module, that the display device has been shut down, and applying the boosting control signal to the voltage supply module, wherein the core voltage is a voltage applied by a power source management integrated circuit of the display driving module to a timing controller of the display driving module.

6. The gate on-state voltage supply method according to claim 5 , further comprising:
detecting, by a voltage detection sub-module, the core voltage at a regular interval;
supplying an n th core voltage detected by the voltage detection sub-module for the n th time to a positive phase input end of a first comparator, supplying a threshold core voltage to a negative phase input end of the first comparator, and connecting an output end of the first comparator to a first input end of an AND gate; wherein the first comparator is configured to outputting a high level signal when the n th core voltage is greater than the threshold core voltage, and output a low level signal when the n th core voltage is smaller than the threshold core voltage, where n is a positive integer;
supplying an (n+1) th core voltage detected by the voltage detection sub-module for the (n+1) th time to a positive phase input end of a second comparator, supplying the threshold core voltage to a negative phase input end of the second comparator, and connecting an output end of the second comparator to an input end of a phase inverter; wherein the second comparator is configured to output a high level signal when the (n+1) th core voltage is greater than the threshold core voltage, and output a low level signal when the (n+1) th core voltage is smaller than the threshold core voltage;
connecting an output end of the phase inverter to a second input end of the AND gate; wherein the phase inverter is configured to output a low level signal when the input end of the phase inverter has received a high level signal, and output a high level signal when the input end of the phase inverter has received a low level signal; and
outputting the boosting control signal via the output end of the AND gate when the first input end and the second input end of the AND gate have received a high level signal, and outputting a maintenance control signal via the output end of the AND gate when the first input end and/or the second input end of the AND gate have received a low level signal.

7. The gate on-state voltage supply method according to claim 6 , further comprising:
connecting an Enable end of the boosting sub-module to the output end of the AND gate; wherein
the boosting sub-module is configured to, upon the receipt of the boosting control sign

Assignees

• Chongqing Boe Optoelectronics Tech Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Liu Zhiyou
• Hsu Yihjen
• Xiao Lijun
• Gao Shaohong
• Luo Jinjia
• Zhao Yanan
• Zhang Xiuqin

Classifications

• G09G3/3677

  suitable for active matrices only · CPC title

• G09G3/3696 Primary

  Generation of voltages supplied to electrode drivers · CPC title

• G09G2330/027

  Arrangements or methods related to powering off a display · CPC title

• G09G2320/0247

  Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes · CPC title

• G09G2300/0408

  Integration of the drivers onto the display substrate · CPC title