Forwarding code word address

Patent metadata

Field	Value
Publication number	US-10831653-B2
Application number	US-201916249817-A
Country	US
Kind code	B2
Filing date	Jan 16, 2019
Priority date	May 15, 2018
Publication date	Nov 10, 2020
Grant date	Nov 10, 2020

Abstract

Methods, systems, and devices for forwarding a code word address are described. A memory subsystem, for example, may configure a code word including user data as a forwarded code word when the code word becomes unreliable or invalid close to or beyond an error recovery capability of the memory subsystem. The memory subsystem may configure the forwarded code word using a forwarded code word format and structure, which may include a bit field in the forwarded code word to indicate a code word condition and to store a quantity of duplicates of a forwarding address. When the memory subsystem receives a code word, the memory system may determine the code word as a forwarded code word such that the memory system may determine a forwarding address (e.g., from the code word). The memory subsystem may then use the forwarding address to access user data.

First claim

What is claimed is:

1. A method, comprising:
receiving a first portion of a code word associated with a memory medium, the code word comprising a set of bit fields indicative of a plurality of channel bursts across a plurality of channels;
determining a code word condition indicated in a bit field of the set of bit fields for at least one channel burst of the first portion of the code word, the code word condition comprising a type of the code word indicating a forwarded code word;
determining a forwarding address of the code word based at least in part on the code word condition; and
communicating with the memory medium based at least in part on the forwarding address of the code word.

2. The method of claim 1 , wherein:
the forwarded code word comprises the bit field indicating the code word condition and a quantity of duplicates of the forwarding address, and
determining the forwarding address of the code word is based at least in part on the quantity of duplicates of the forwarding address.

3. The method of claim 1 , wherein:
the at least one channel burst of the first portion of the code word comprises a plurality of duplicates of the forwarding address.

4. The method of claim 3 , further comprising:
determining, based at least in part on the code word condition, a first quantity of address bits across the plurality of duplicates of the forwarding address, each bit of the first quantity of address bits indicating a first logic state of an address bit of the forwarding address, wherein the forwarding address of the code word is determined based at least in part on the first quantity of address bits of the forwarding address.

5. The method of claim 4 , further comprising:
determining that the first quantity of address bits is greater than a threshold quantity of duplicates of the forwarding address in at least the first portion of the code word; and
assigning the first logic state to the address bit of the forwarding address based at least in part on determining that the first quantity of address bits is greater than the threshold quantity of duplicates of the forwarding address, wherein the forwarding address of the code word is determined based at least in part on assigning the first logic state to the address bit of the forwarding address.

6. The method of claim 1 , further comprising:
receiving a second portion of the code word, concurrent with determining the code word condition, based at least in part on receiving the first portion of the code word.

7. The method of claim 1 , further comprising:
receiving an additional portion of the code word based at least in part on the code word condition, wherein the forwarding address of the code word is determined based at least in part on receiving the additional portion of the code word.

8. The method of claim 7 , further comprising:
identifying a majority logic state of an address bit of the forwarding address across a quantity of duplicates of the forwarding address in the code word; and
assigning the majority logic state to the address bit of the forwarding address based at least in part on identifying the majority logic state of the address bit, wherein the forwarding address of the code word is determined based at least in part on assigning the majority logic state to the address bit of the forwarding address.

9. The method of claim 8 , wherein identifying the majority logic state of the address bit of the forwarding address further comprises:
determining a first quantity of address bits across the quantity of duplicates of the forwarding address in the code word, each of the first quantity of address bits indicating a first logic state of the address bit of the forwarding address;
determining a second quantity of address bits across the quantity of duplicates of the forwarding address in the code word, each of the second quantity of address bits indicating a second logic state of the address bit of the forwarding address;
comparing the first quantity of address bits indicating the first logic state and the second quantity of address bits indicating the second logic state; and
determining the majority logic state of the address bit of the forwarding address based at least in part on the comparison.

10. The method of claim 1 , wherein:
the bit field indicating the code word condition are configured to convey valid information when a first quantity of the bit field are erroneous, wherein the first quantity is less than a threshold associated with a fault tolerance level of the bit field indicating the code word condition.

11. The method of claim 1 , further comprising:
transmitting an access command to the memory medium using the forwarding address of the code word, wherein communicating with the memory medium is based at least in part on transmitting the access command.

12. An apparatus, comprising:
a plurality of memory media, at least one memory medium of the plurality configured to generate a code word comprising a set of bit fields indicative of a plurality of channel bursts across a plurality of channels;
at least one host interface configured to receive an access command from a host device; and
a plurality of port managers in electronic communication with the at least one host interface and each port manager in electronic communication with different one or more memory media of the plurality, at least one port manager of the plurality is configured to:
receive, based at least in part on receiving the access command, a first portion of the code word comprising a bit field of the set of bit fields for at least one channel burst of the plurality of channel bursts of the first portion of the code word;
determine an indication of a forwarded code word in the first portion of the code word;
determine a forwarding address of the code word based at least in part on the indication of the forwarded code word; and
communicate with the at least one of the plurality of memory media or the at least one host interface based at least in part on the forwarding address of the code word.

13. The apparatus of claim 12 , wherein the at least one port manager of the plurality is further configured to:
determine a code word condition indicated in the bit field, wherein the indication of the forwarded code word is determined based at least in part on the code word condition.

14. The apparatus of claim 12 , wherein the at least one port manager of the plurality is further configured to:
receive an additional portion of the code word after receiving the first portion of the code word, wherein the forwarding address of the code word is determined based at least in part on receiving the additional portion of the code word, and wherein the indication of the forwarded code word is concurrently determined with receiving the additional portion of the code word.

15. The apparatus of claim 14 , wherein the at least one port manager of the plurality is further configured to:
determine a first quantity of address bits across a quantity of duplicates of the forwarding address in the code word based at least in part on receiving the additional portion of the code word, each of the first quantity of address bits indicating a first logic state of an address bit of the forwarding address;
determine that the first quantity of address bits is greater than a threshold quantity of duplicates of the forwarding address in the code word; and
assign the first logic state to the address bit of the forwarding address based at least in part on determining that the first quantity of address bits is greater than the threshold quantity of duplicates of the forward

Assignees

• Micron Technology Inc

Inventors

• Pawlowski Joseph Thomas

Classifications

• G11C29/42 Primary

  using error correcting codes [ECC] or parity check · CPC title

• G06F11/183

  by voting, the voting not being performed by the redundant components · CPC title

• G11C2029/1202

  Word line control · CPC title

• G11C29/18 Primary

  Address generation devices; Devices for accessing memories, e.g. details of addressing circuits · CPC title

• G06F11/1076

  Parity data used in redundant arrays of independent storages, e.g. in RAID systems · CPC title