Method to create a free-standing membrane for biological applications

US10830756B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10830756-B2
Application numberUS-201816122171-A
CountryUS
Kind codeB2
Filing dateSep 5, 2018
Priority dateSep 22, 2017
Publication dateNov 10, 2020
Grant dateNov 10, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Methods of manufacturing well-controlled nanopores using directed self-assembly and methods of manufacturing free-standing membranes using selective etching are disclosed. In one aspect, one or more nanopores are formed by directed self-assembly with block co-polymers to shrink the critical dimension of a feature which is then transferred to a thin film. In another aspect, a method includes providing a substrate having a thin film over a highly etchable layer thereof, forming one or more nanopores through the thin film over the highly etchable layer, for example, by a pore diameter reduction process, and then selectively removing a portion of the highly etchable layer under the one or more nanopores to form a thin, free-standing membrane.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for forming a substrate, comprising: providing a substrate having a thin film over a highly etchable layer thereof; forming one or more nanopores through the thin film over the highly etchable layer using a pore diameter reduction process; and selectively removing a portion of the highly etchable layer under the one or more nanopores to form a thin, free-standing membrane, wherein the pore diameter reduction process comprises: forming at least one first feature in the thin film; depositing a block co-polymer in the first feature, the block co-polymer comprising at least a first domain and a second domain; and etching the second domain. 2. A method for forming a substrate, comprising: providing a substrate having a thin film over a highly etchable layer thereof; forming one or more nanopores through the thin film over the highly etchable layer using a pore diameter reduction process; and selectively removing a portion of the highly etchable layer under the one or more nanopores to form a thin, free-standing membrane, wherein the pore diameter reduction process comprises: forming at least one first feature in the thin film; depositing a dielectric material over the at least one first feature; and etching a portion of the dielectric material over the at least one first feature. 3. The method of claim 2 , wherein the method further comprises: repeating the depositing the dielectric material and the etching the portion of the dielectric material until at least one nanopore is formed. 4. A method for forming a substrate, comprising: providing a substrate having a thin film over a highly etchable layer thereof; forming one or more nanopores through the thin film over the highly etchable layer using a pore diameter reduction process; and selectively removing a portion of the highly etchable layer under the one or more nanopores to form a thin, free-standing membrane, wherein the pore diameter reduction process comprises: forming at least one first feature in the thin film; oxidizing the substrate to form a dielectric material over the substrate to fill the at least one opening, the dielectric material having at least one seam formed therein; and exploiting the at least one seam to form at least one nanopore. 5. A method for forming a substrate, comprising: providing a substrate having a thin film over a highly etchable layer thereof; forming one or more nanopores through the thin film over the highly etchable layer using a pore diameter reduction process; selectively removing a portion of the highly etchable layer under the one or more nanopores to form a thin, free-standing membrane; depositing one or more additional layers over the thin film; and depositing a positive electrode and a negative electrode over the thin film. 6. A substrate, comprising: a first silicon layer; a dielectric layer disposed over the first silicon layer; a second silicon layer disposed over a portion of the dielectric layer; a free-standing membrane disposed over the second silicon layer, the free-standing membrane having at least one nanopore and at least one opening formed therethrough; a first well disposed below the at least one nanopore; and a second well disposed above the at least one nanopore. 7. The substrate of claim 6 , comprising: a DNA-containing fluid in at least one of the first well and the second well. 8. The substrate of claim 6 , wherein a diameter of each of the at least one nanopore is less than or equal to about 100 nanometers. 9. The substrate of claim 6 , wherein a thickness of the free-standing membrane is less than or equal to about 50 nanometers.

Assignees

Inventors

Classifications

  • batch processes · CPC title

  • Holes · CPC title

  • Diaphragms, i.e. structures separating two media that can control the passage from one medium to another; Membranes, i.e. diaphragms with filtering function · CPC title

  • Investigating individual macromolecules, e.g. by translocation through nanopores (Coulter counters in general G01N15/12; fabrication methods for nanoscale apertures B81B1/00; sequencing of nucleic acids C12Q1/68) · CPC title

  • comprising flexible or deformable elements · CPC title

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What does patent US10830756B2 cover?
Methods of manufacturing well-controlled nanopores using directed self-assembly and methods of manufacturing free-standing membranes using selective etching are disclosed. In one aspect, one or more nanopores are formed by directed self-assembly with block co-polymers to shrink the critical dimension of a feature which is then transferred to a thin film. In another aspect, a method includes pro…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification G01N33/48721. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 10 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).