Bias control circuit and bias control method

US10823989B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10823989-B2
Application numberUS-201816629174-A
CountryUS
Kind codeB2
Filing dateJul 12, 2018
Priority dateJul 14, 2017
Publication dateNov 3, 2020
Grant dateNov 3, 2020

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  5. First independent claim

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Abstract

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A control unit of a bias control circuit performs a loop process that fixes a second bias voltage and iterates a process of recording a pair of a first candidate bias voltage and a second candidate bias voltage that are a first bias voltage when optical power of a multi-level QAM signal output by an optical modulator is controlled so that the optical power converges to a value in the vicinity of the maximum value or the minimum value before and after a third bias voltage is increased or decreased by a half-wave voltage while changing the second bias voltage within a predetermined range. The control unit calculates the difference between the first candidate bias voltage and the second candidate bias voltage for each of a plurality of recorded pairs and determines a value between first candidate bias voltage and the second candidate bias voltage of a pair selected on the basis of the calculated difference as the value of the first bias voltage.

First claim

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The invention claimed is: 1. A bias control circuit that performs bias control of an optical modulator, wherein the optical modulator comprises: a first optical phase modulation unit that changes the phase or intensity of input light in accordance with a first n-ary data signal, which takes n kinds of values; a second optical phase modulation unit that changes the phase or intensity of input light in accordance with a second n-ary data signal, which takes n kinds of values; an optical phase shifter that delays at least one of output light from the first optical phase modulation unit and output light from the second optical phase modulation unit to apply an optical phase difference of +π/2 or −π/2; and a combining unit that combines the output light from the first optical phase modulation unit and the output light from the second optical phase modulation unit, the optical phase difference by the optical phase shifter having been applied to at least one of the output light from the first optical phase modulation unit and the output light from the second optical phase modulation unit, and outputs a generated multi-level QAM signal, the bias control circuit comprises: a first bias power supply that generates a first bias voltage for performing a setting so that the output light from the first optical phase modulation unit is extinguished when the first n-ary data signal is a zero level; a second bias power supply that generates a second bias voltage for performing a setting so that the output light from the second optical phase modulation unit is extinguished when the second n-ary data signal is a zero level; a third bias power supply that generates a third bias voltage for adjusting a phase shift amount of the optical phase shifter; an optical power monitor that monitors optical power of output light from the optical modulator; and a control unit that controls the first bias voltage generated by the first bias power supply, the second bias voltage generated by the second bias power supply, and the third bias voltage generated by the third bias power supply on the basis of a monitoring result by the optical power monitor, and the control unit performs a loop process that fixes the second bias voltage and iterates a process of recording a pair of a first candidate bias voltage and a second candidate bias voltage that are the first bias voltage when the optical power is controlled so that the optical power converges to a value in the vicinity of the maximum value or the minimum value before and after the third bias voltage is increased or decreased by a half-wave voltage while changing the second bias voltage within a predetermined range, and performs a voltage determination process that calculates the difference between the first candidate bias voltage and the second candidate bias voltage for each of a plurality of recorded pairs and determines a value between the first candidate bias voltage and the second candidate bias voltage of a pair selected on the basis of the calculated difference as the first bias voltage to be generated by the first bias power supply. 2. A bias control circuit that performs bias control of an optical modulator, wherein the optical modulator comprises: a first optical phase modulation unit that changes the phase or intensity of input light in accordance with a first n-ary data signal, which takes n kinds of values; a second optical phase modulation unit that changes the phase or intensity of input light in accordance with a second n-ary data signal, which takes n kinds of values; an optical phase shifter that delays at least one of output light from the first optical phase modulation unit and output light from the second optical phase modulation unit to apply an optical phase difference of +π/2 or −π/2; and a combining unit that combines the output light from the first optical phase modulation unit and the output light from the second optical phase modulation unit, the optical phase difference by the optical phase shifter having been applied to at least one of the output light from the first optical phase modulation unit and the output light from the second optical phase modulation unit, and outputs a generated multi-level QAM signal, the bias control circuit comprises: a first bias power supply that generates a first bias voltage for performing a setting so that output light from the first optical phase modulation unit is extinguished when the first n-ary data signal is a zero level; a second bias power supply that generates a second bias voltage for performing a setting so that output light from the second optical phase modulation unit is extinguished when the second n-ary data signal is a zero level; a third bias power supply that generates a third bias voltage for adjusting a phase shift amount of the optical phase shifter; an optical power monitor that monitors optical power of output light from the optical modulator; and a control unit that controls the first bias voltage generated by the first bias power supply, the second bias voltage generated by the second bias power supply, and the third bias voltage generated by the third bias power supply on the basis of a monitoring result by the optical power monitor, and the control unit performs a loop process that fixes the second bias voltage and iterates a process of applying dithering of a predetermined frequency to the amplitude of the first n-ary data signal or the first bias voltage and recording a pair of a first candidate bias voltage and a second candidate bias voltage that are the first bias voltage when control is performed so that a component of a frequency that is an integral multiple of the predetermined frequency superposed on the optical power converges to a value in the vicinity of zero, the maximum, or the minimum before and after the third bias voltage is increased or decreased by a half-wave voltage while changing the second bias voltage within a predetermined range, and performs a voltage determination process that calculates the difference between the first candidate bias voltage and the second candidate bias voltage for each of a plurality of recorded pairs and determines a value between the first candidate bias voltage and the second candidate bias voltage of a pair selected on the basis of the calculated difference as the first bias voltage to be generated by the first bias power supply. 3. The bias control circuit according to claim 1 , wherein the control unit determines that the second bias voltage when the selected pair has been obtained is to be generated by the second bias power supply. 4. The bias control circuit according to claim 1 , wherein the control unit performs the loop process and the voltage determination process after exchanging a procedure for the first bias voltage and a procedure for the second bias voltage, and determines the second bias voltage to be generated by the second bias power supply. 5. The bias control circuit according to claim 3 , wherein the control unit controls the third bias voltage using the determined first bias voltage and the determined second bias voltage and ends a start-up process of the bias control circuit. 6. The bias control circuit according to claim 1 , wherein the Pockels effect or heat expansion of optical waveguides is utilized when the first bias voltage, the second bias voltage, and the third bias voltage adjust optical phases. 7. A bias control method for an optical modulator that is executed by a bias control circuit, wherein the optical modulator comprises: a first optical phase modulation unit that changes the phase or intensity of input light in accordance with a first n-ary data signal, which takes n kinds of values; a second optical phase modulation unit that changes the phase or intensity of input light

Assignees

Inventors

Classifications

  • in an optical waveguide structure · CPC title

  • Digital modulation, e.g. differential phase shift keying [DPSK] or frequency shift keying [FSK] · CPC title

  • G02F1/0327Primary

    Operation of the cell; Circuit arrangements (G02F1/05 takes precedence) · CPC title

  • for the control of the intensity, phase, polarisation or colour  (G02F1/29, G02F1/35 take precedence) · CPC title

  • Phase-only modulation · CPC title

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What does patent US10823989B2 cover?
A control unit of a bias control circuit performs a loop process that fixes a second bias voltage and iterates a process of recording a pair of a first candidate bias voltage and a second candidate bias voltage that are a first bias voltage when optical power of a multi-level QAM signal output by an optical modulator is controlled so that the optical power converges to a value in the vicinity o…
Who is the assignee on this patent?
Nippon Telegraph & Telephone
What technology area does this patent fall under?
Primary CPC classification G02F1/0327. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 03 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).