Apparatus and method for manufacturing substrates

Patent metadata

Field	Value
Publication number	US-10823779-B2
Application number	US-201815964842-A
Country	US
Kind code	B2
Filing date	Apr 27, 2018
Priority date	Apr 2, 2012
Publication date	Nov 3, 2020
Grant date	Nov 3, 2020

Abstract

A substrate manufacturing apparatus includes a test apparatus including a test handler module for performing a test process on a substrate. The test handler module may include a conveyor unit to transfer a substrate, a handler unit for performing a test process on the substrate, and a transfer unit for transferring the substrate between the conveyor unit and the handler unit. The conveyor unit may include a feed conveyor and a discharge conveyor spaced apart from the feed conveyor.

First claim

What is claimed is:

1. A substrate manufacturing method comprising:
assembling a plurality of integral unit substrates on a substrate comprising a test terminal in a front edge region of the substrate, wherein each of the plurality of integral unit substrates is electrically connected to the test terminal;
moving the substrate such that the substrate is loaded into a test chamber;
performing a test upon the plurality of integral unit substrates on the substrate in the test chamber, wherein the plurality of integral unit substrates is tested concurrently;
unloading the substrate tested inside the test chamber; and
separating the plurality of integral unit substrates from one another after performing the test,
wherein the plurality of integral unit substrates is arranged in one or more rows of at least two.

2. The substrate manufacturing method of claim 1 , wherein the assembling includes mounting an electronic component on each of the plurality of integral unit substrates, and reflowing the electronic component on each of the plurality of integral unit substrates.

3. The substrate manufacturing method of claim 1 , wherein the substrate is an array printed circuit board where the plurality of integral unit substrates is formed, and
wherein each of the plurality of integral unit substrates is electrically connected to the test terminal through lines formed on the array printed circuit board.

4. The substrate manufacturing method of claim 1 , wherein moving the substrate into the test chamber includes lifting the substrate such that the substrate is disposed inside a test chamber to insert the test terminal into a socket of the test chamber.

5. The substrate manufacturing method of claim 1 , further comprising the step of marking each of the plurality of integral unit substrates to indicate whether it passed the test.

6. The substrate manufacturing method of claim 1 , wherein the moving the substrate into the test chamber is carried out through a feed conveyor, and
wherein the unloading the substrate is carried out through a discharge conveyor.

7. The substrate manufacturing method of claim 6 , wherein the feed conveyor and the discharge conveyor are provided such that they extend parallel to a first direction, and
wherein the feed conveyor and the discharge conveyor are spaced apart from each other in a second direction orthogonal to the first direction when viewed from the top.

8. The substrate manufacturing method of claim 1 , wherein the step of assembling the plurality of integral unit substrates includes the step of loading a controller on each of the plurality of integral unit substrates,
wherein the step of assembling the plurality of integral unit substrates includes the step of loading non-volatile memory on each of the plurality of integral unit substrates.

9. The substrate manufacturing method of claim 1 , wherein some of the integral unit substrates have a different type than others of the integral unit substrates, and
wherein the integral unit substrates belonging to one row have a same type.

10. A substrate manufacturing method, comprising:
providing a plurality of substrates comprising a test terminal,
forming a plurality of integral unit substrates onto each of the plurality of substrates, wherein the plurality of integral unit substrates is arranged in one or more rows of at least two;
placing each of the plurality of substrates inside a plurality of test chambers to concurrently perform a test process on the plurality of substrates inside each of the plurality of test chambers;
moving the plurality of substrates away from the plurality of test chambers; and
separating the plurality of integral unit substrates from one another after performing the test,
wherein the plurality of integral unit substrates on one of the plurality of substrate disposed are concurrently tested at the performing the test process.

11. The substrate manufacturing method of claim 10 , wherein the plurality of integral unit substrates are electrically connecting to the test terminal.

12. The substrate manufacturing method of claim 11 , wherein the plurality of integral unit substrates is connected to a socket of the test chamber through the test terminal in performing the test process.

13. The substrate manufacturing method of claim 10 , wherein each of the plurality of substrates is an array printed circuit board where the plurality of integral unit substrates is formed,
wherein the test terminal is formed in a front edge region of the array printed circuit board, and
wherein each of the plurality of integral unit substrates is electrically connected to the test terminal through lines formed on the array printed circuit board.

14. The substrate manufacturing method of claim 10 , wherein the placing each of the plurality of substrates inside the plurality of test chamber is carried out through a feed conveyor, and the moving the plurality of substrates away from the plurality of test chamber is carried out through a discharge conveyor,
wherein the feed conveyor and the discharge conveyor are provided such that they extend parallel to a first direction, and
wherein the feed conveyor and the discharge conveyor are spaced apart from each other in a second direction orthogonal to the first direction when viewed from the top.

15. The substrate manufacturing method of claim 14 , wherein each of the test chambers has an opening in a front face,
wherein the placing each of the plurality of substrates includes:
lifting one of the plurality of substrates at the feed conveyor;
completely disposing the lifted one of the plurality of substrates in one of the test chambers through the opening of the one of the test chambers;
inserting the test terminal of the one of the plurality of substrates disposed in the one of the test chambers into a socket of the one of the test chambers; and
closing the opening of the one of the test chambers after placing the one of the plurality of substrates in the one of the test chambers.

16. A substrate manufacturing method, comprising:
assembling a plurality of integral unit substrates on a substrate, each of the plurality of integral unit substrates comprising an electronic component and electrically connecting to a test terminal in an edge region of the substrate, and wherein the plurality of integral unit substrates is arranged in one or more rows of at least two;
conveying the substrate into a test chamber to insert the test terminal into a socket of the test chamber;
performing a test process on the substrate inside the test chamber;
conveying the substrate away from the test chamber after performing the test process; and
separating the plurality of integral unit substrates from one another after performing the test,
wherein the plurality of integral unit substrates is tested concurrently through the test terminal in performing the test process.

17. The substrate manufacturing method of claim 16 , wherein the edge region of the substrate providing the test terminal is a front edge region of the substrate, and
wherein each of the plurality of integral unit substrates is electrically connected to the test terminal through lines formed on the substrate.

18. The substrate manufacturing method of claim 16 , wherein the substrate is provided in plurality,
wherein the substrates have the same length of horizontal sides, and
wherein some of the substrates have different lengths of vertical sides.

19. The substrate manufacturing method of claim 16 , wherein the substrate is conveyed

Assignees

• Samsung Electronics Co Ltd
• Semes Co Ltd

Inventors

• Lee Youngchul
• Kwon Semin
• Lee Jinhwan
• Oh Jea-Muk
• Lee Kyungsook
• Lee Nam-Hong

Classifications

• G01R31/2808 Primary

  Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards (probe, multiprobe, probe manipulator or probe fixture G01R1/067) · CPC title

• G01R1/0433

  Sockets for IC's or transistors · CPC title

• G01R31/2893 Primary

  Handling, conveying or loading, e.g. belts, boats, vacuum fingers (G01R31/2867 takes precedence; handling semiconductor devices or wafers during manufacture or treatment H10P72/00) · CPC title