Power efficient complementary amplifier and method thereof
US-2024313721-A1 · Sep 19, 2024 · US
US10823765B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10823765-B2 |
| Application number | US-201815965994-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 30, 2018 |
| Priority date | Mar 8, 2018 |
| Publication date | Nov 3, 2020 |
| Grant date | Nov 3, 2020 |
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A low power comparator and a self-regulated device for adjusting power saving level of an electronic device are provided. The low power comparator includes an input differential pair circuit, a self-regulated device, and a tail current switch. The input differential pair circuit is configured to receive input signals to be compared. The self-regulated device is coupled to the input differential pair circuit and includes a self-regulated circuit which has a first transistor with a first threshold voltage and a second transistor with a second threshold voltage and is configured to adjust a power saving level of the low-power comparator according to the first threshold voltage and the second threshold voltage. The tail current switch is coupled to the input differential pair circuit through the self-regulated circuit to provide a constant current to the input differential pair circuit.
Opening claim text (preview).
What is claimed is: 1. A low-power comparator, comprising: an input differential pair circuit, configured to receive input signals to be compared; a self-regulated device, coupled to the input differential pair circuit, wherein the self-regulating device comprises: a self-regulated circuit, having a first transistor with a first threshold voltage and a second transistor with a second threshold voltage, configured to adjust a power saving level of the low-power comparator according to the first threshold voltage and the second threshold voltage; and a mode selector, configured to enable the self-regulated circuit during a power saving mode of the low-power comparator and disable the self-regulated circuit during a normal mode of the low-power comparator; and a tail current switch, coupled to the input differential pair circuit through the self-regulated circuit to provide a constant current to the input differential pair circuit, wherein a control terminal of the first transistor is electrically coupled to a first output node of the input differential pair circuit, a control terminal of the second transistor is electrically coupled to a second output node of the input differential pair circuit, and the control terminal of the first transistor is electrically insulated from the control terminal of the second transistor during a comparison operation of the low-power comparator, wherein the mode selector comprises a third transistor, a control terminal of the third transistor receives an enable signal, a first terminal of the third transistor is coupled to a first terminal of the first transistor, a first terminal of the second transistor and the input differential pair circuit, and a second terminal of the third transistor is coupled to a second terminal of the first transistor, and a second terminal of the second transistor and the tail current switch. 2. The low-power comparator of claim 1 , wherein a semiconductor type of the first transistor is same as a semiconductor type of the second transistor of the self-regulated circuit. 3. The low-power comparator of claim 1 , wherein the first output node of the input differential pair circuit is regulated to the first threshold voltage by the first transistor when a comparison operation of the low-power comparator is completed, and the second output node of the input differential pair circuit is regulated to the second threshold voltage by the second transistor when the comparison operation is completed. 4. The low-power comparator of claim 3 , further comprising: a pre-charge circuit, coupled to the input differential pair circuit, wherein the pre-charge circuit refreshes the first output node of the input differential pair circuit from the first threshold voltage to a predetermined voltage in a refreshing operation of the electronic device, and the pre-charge circuit refreshes the second output node of the input differential pair circuit from the second threshold voltage to the predetermined voltage in the refreshing operation of the electronic device. 5. The low-power comparator of claim 4 , further comprising: a transistor cross-coupled pair, having a third output node and a fourth output node, wherein the third output node is regulated to the first threshold voltage by the first transistor when the comparison operation is completed, and the fourth output node is regulated to the second threshold voltage by the second transistor when the comparison operation is completed. 6. The low-power comparator of claim 1 , wherein the mode selector is configured to enable the self-regulated device based on an enable signal in the power saving mode, and the mode selector is configured to disable the self-regulated based on the enable signal in the normal mode. 7. The low-power comparator of claim 6 , wherein the mode selector further comprises a third transistor and a fourth transistor, a control terminal of the fourth transistor receive the enable signal, a first terminal of the fourth transistor are coupled to a first terminal of the first transistor and a first terminal of the second transistor, and a second terminal of the fourth transistor are coupled to a second terminal of the first transistor and a second terminal of the second transistor. 8. A low-power comparator, comprising: an input differential pair circuit, comprising a first pair of transistors arranged symmetrically in a first direction; a self-regulated device, coupled to the input differential pair circuit, wherein the self-regulated device comprises: a self-regulated circuit, comprising a third pair of transistors arranged symmetrically in the first direction, configured to adjust the power saving level of the low-power comparator according to threshold voltages of the third pair of transistors; and a mode selector, configured to enable the self-regulated circuit during a power saving mode of the low-power comparator and disable the self-regulated circuit during a normal mode of the low-power comparator; and a tail current switch, coupled to the self-regulated device, comprising a fourth pair of transistors arranged symmetrically in the first direction, wherein the third pair of transistors comprises a first transistor and a second transistor, a control terminal of the first transistor is coupled to a first output node of the input differential pair circuit, a control terminal of the second transistor is coupled to a second output node of the input differential pair circuit, and the control terminal of the first transistor is electrically insulated from the control terminal of the second transistor during a comparison operation of the low-power comparator, wherein the mode selector comprises a third transistor, a control terminal of the third transistor receives an enable signal, a first terminal of the third transistor is coupled to a first terminal of the first transistor, a first terminal of the second transistor and the input differential pair circuit, and a second terminal of the third transistor is coupled to a second terminal of the first transistor, and a second terminal of the second transistor and the tail current switch. 9. The low-power comparator of claim 8 , wherein the self-regulated device is disposed between the input differential pair circuit and the tail current switch. 10. The low-power comparator of claim 8 , further comprising: a first transistor cross-coupled pair, coupled to the input differential pair circuit; and a second transistor cross-coupled pair, coupled to the first transistor cross-coupled pair, wherein one transistor of the first transistor cross-coupled pair and one transistor of the second transistor cross-coupled pair are arranged symmetrically in the first direction, and another one transistor of the first transistor cross-coupled pair and another one transistor of the second transistor cross-coupled pair are arranged symmetrically in the first direction. 11. The low-power comparator of claim 8 , wherein a semiconductor type of the first transistor is same as a semiconductor type of the second transistor of the self-regulated circuit. 12. The low-power comparator of claim 8 , wherein the mode selector further comprises a fourth transistor, a control terminal of the fourth transistor receive an enable signal, a first terminal of the fourth transistor are coupled to a first terminal of the first transistor and a first terminal of the second transistor, and a second terminal of the fourth transistor are coupled to a second terminal of the first transistor and a second terminal of the second transistor. 13. A self-regulated device for adjusting power saving level of an e
Non-folded cascode stages · CPC title
with at least one differential stage · CPC title
the AAC comprising a cross coupling circuit, e.g. two extra transistors cross coupled · CPC title
Circuits for comparing several input signals and for indicating the result of this comparison, e.g. equal, different, greater, smaller (comparing pulses or pulse trains according to amplitude) · CPC title
Regulating electric power · CPC title
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