Modular server architectures

US10820442B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10820442-B2
Application numberUS-201816000791-A
CountryUS
Kind codeB2
Filing dateJun 5, 2018
Priority dateJun 5, 2018
Publication dateOct 27, 2020
Grant dateOct 27, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Examples relate to a modular server architecture that comprises a server chassis, a plurality of independent resource modules releasable attached to the server chassis a memory semantic protocol controller connected to the plurality of independent resource modules. Each one of the resource modules of the plurality of resource modules has a distinct Printed Circuit Board (PCB). The memory semantic media controller is to manage the plurality of independent resource modules.

First claim

Opening claim text (preview).

The invention claimed is: 1. A server formed according to a modular server architecture, comprising: a server chassis including a number of pre-defined mounting regions; a plurality of independent resource modules, wherein each resource module includes a distinct Printed Circuit Board (PCB) and wherein each resource module mechanically attaches to one of the pre-defined mounting regions via the PCB; and a memory semantic protocol controller connected to the plurality of independent resource modules, wherein the memory semantic protocol controller is to manage the plurality of independent resource modules and wherein the plurality of independent resource modules are communicatively and electrically connected to each other and to the memory semantic protocol controller by cables. 2. The server of claim 1 , wherein the memory semantic protocol controller is a Gen-Z protocol controller. 3. The server of claim 1 , wherein the memory semantic protocol controller is an Open Coherent Accelerator Processor Interface (OpenCAPI) protocol controller. 4. The server of claim 1 , wherein the memory semantic protocol controller is a Cache Coherent Interconnect for Accelerators (CCIX) protocol controller. 5. The server of claim 1 , wherein the memory semantic protocol controller is integrated with a computing resource. 6. The server of claim 1 , wherein connections between the memory semantic protocol controller and the plurality of independent resource modules are one of: peer-to-peer connections, fabric connections and a combination thereof. 7. The server of claim 1 , wherein the memory semantic protocol controller is to manage data exchange between the plurality of independent resource modules and between the plurality of independent resource modules with other devices within the server chassis. 8. The server of claim 1 , wherein the cables are attached to the plurality of independent resource modules by cable harnesses. 9. The server of claim 1 , wherein the resource modules each include one or more resources selected from a group comprising processing units, memory expanders, memory devices, accelerator devices, and combinations thereof. 10. The server of claim 1 , wherein the resource modules are releasable mounted on pre-defined module installation locations in the server chassis. 11. The server of claim 10 , wherein the resource modules are based on a common form factor to fit to the pre-defined module installation locations. 12. The server of claim 10 , wherein the pre-defined mounting locations are configured to be compatible with any resource module from a plurality of different types of resource modules. 13. A method for manufacturing a server according to a modular server architecture, the method comprising: Mechanically attaching a plurality of independent resource modules and a memory semantic protocol controller to pre-defined mounting regions on a basepan of a server chassis, each resource module of the plurality of independent resource modules having a distinct Printed Circuit Board (PCB), wherein the resource modules are attached to the server chassis via a retention mechanism included on the PCB; and interconnecting the plurality of independent resource modules and the memory semantic protocol controller with cables; and providing, by the memory semantic protocol controller, a memory semantic protocol interface between to the plurality of resource modules, the memory semantic protocol interface to control the plurality of independent resource modules. 14. The method of claim 13 , wherein the memory semantic protocol controller is one of: a Gen-Z protocol controller, an Open Coherent Accelerator Processor Interface (OpenCAPI) protocol controller and a Cache Coherent Interconnect for Accelerators (CCIX) protocol controller. 15. The method of claim 13 , wherein the connections between the memory semantic protocol controller and the plurality of independent resource modules are one of: peer-to-peer connections, fabric connections and a combination thereof. 16. The method of claim 13 , comprising: identifying a desired resource configuration for the server; and selecting the plurality of independent resource modules from among a plurality of different types of resource modules based on the desired resource configuration, each of the types of resource module including a different combination of one or more resources. 17. The method of claim 13 , comprising attaching the cables to the plurality of resource modules using cable harnesses. 18. The method of claim 13 , comprising selecting the resource modules from a group comprising processing units, memory expanders, memory devices, accelerator devices, and combinations thereof. 19. The method of claim 13 , comprising releasably mounting the resource modules on pre-defined module installation locations in the server chassis. 20. The method of claim 13 , wherein the retention mechanism is a screw or bolt.

Assignees

Inventors

Classifications

  • H05K7/1422Primary

    Printed circuit boards receptacles, e.g. stacked structures, electronic circuit modules or box like frames · CPC title

  • using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence) · CPC title

  • Mounting of fixed or removable disk drives · CPC title

  • H05K7/1487Primary

    Blade assemblies, e.g. blade cases or inner arrangements within a blade · CPC title

  • having cable management arrangements (management of optical cables G02B6/444; in telecommunication cabinets H04Q1/06) · CPC title

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What does patent US10820442B2 cover?
Examples relate to a modular server architecture that comprises a server chassis, a plurality of independent resource modules releasable attached to the server chassis a memory semantic protocol controller connected to the plurality of independent resource modules. Each one of the resource modules of the plurality of resource modules has a distinct Printed Circuit Board (PCB). The memory semant…
Who is the assignee on this patent?
Hewlett Packard Entpr Dev Lp
What technology area does this patent fall under?
Primary CPC classification H05K7/1422. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 27 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).