Task assembly for SIMD processing

Patent metadata

Field	Value
Publication number	US-10817973-B2
Application number	US-201916282680-A
Country	US
Kind code	B2
Filing date	Feb 22, 2019
Priority date	Mar 7, 2016
Publication date	Oct 27, 2020
Grant date	Oct 27, 2020

Abstract

A cache system in a graphics processing system stores graphics data items for use in rendering primitives. It is determined whether graphics data items relating to primitives to be rendered are present in the cache, and if not then computation instances for generating the graphics data items are created. Computation instances are allocated to tasks using a task assembly unit which stores task entries for respective tasks. The task entries indicate which computation instances have been allocated to the respective tasks. The task entries are associated with characteristics of computation instances which can be allocated to the respective tasks. A computation instance to be executed is allocated to a task based on the characteristics of the computation instance. SIMD processing logic executes computation instances of a task outputted from the task assembly unit to thereby determine graphics data items, which can be used to render the primitives.

First claim

What is claimed is:

1. A graphics processing system configured to render an image, the graphics processing system comprising:
a task assembly unit configured to:
store a plurality of task entries for respective tasks to which computation instances can be allocated, the computation instances being for generating graphics data items for use in rendering the image, wherein a computation instance has one of the following shader types: (i) vertex shader, (ii) hull shader, (iii) domain shader, and (iv) geometry shader, and wherein the task entries are associated with shader types,
allocate, to a task, a computation instance to be executed, based on the shader type of the computation instance, and
output one or more tasks for execution; and

processing logic configured to execute computation instances of a task outputted from the task assembly unit to thereby generate graphics data items for use in rendering the image;
wherein the graphics processing system is configured to render the image using the generated graphics data items.

2. The graphics processing system of claim 1 , further comprising a task dependency unit configured to maintain indications of dependencies between different tasks for which task entries are stored in the task assembly unit.

3. The graphics processing system of claim 2 , wherein the task assembly unit is configured to output a particular task for execution in response to a further task, which has one or more dependencies on the particular task, being due to be executed.

4. The graphics processing system of claim 2 , further configured to use the task dependency unit to ensure that the dependencies of a task are satisfied before it is executed.

5. The graphics processing system of claim 2 , wherein the task dependency unit includes a matrix to indicate which tasks, if any, each task entry to be executed is dependent upon.

6. The graphics processing system of claim 2 , wherein the task dependency unit includes a table to indicate, for different states, which task entries are stored in the task assembly unit for different shader types.

7. The graphics processing system of claim 1 , further comprising a cache configured to store a hierarchy of graphics data items, wherein graphics data items defining primitives to be rendered are derivable from one or more input graphics data items via a sequence of one or more processing stages implemented by executing computation instances.

8. The graphics processing system of claim 7 , wherein the sequence of processing stages are implemented by executing computation instances having one or more of the following shader types: (i) vertex shader, (ii) hull shader, (iii) domain shader, and (iv) geometry shader.

9. The graphics processing system of claim 7 , configured to retrieve graphics data items from the cache in a bottom-up manner.

10. The graphics processing system of claim 7 , wherein said hierarchy includes one or both of: (i) one or more of the input graphics data items, and (ii) one or more graphics data items representing results of processing stages of the sequence.

11. The graphics processing system of claim 7 , wherein the cache is part of a cache system which is configured to determine whether graphics data items are present in the cache, wherein the task assembly unit is configured to allocate a computation instance to a task if the computation instance is for generating a graphics data item which is determined by the cache system as being not present in the cache.

12. The graphics processing system of claim 11 , wherein the cache system is further configured to allocate portions of the cache to each of the computation instances allocated to tasks in the task assembly unit.

13. The graphics processing system of claim 7 , wherein graphics data items generated by the processing logic are for storage in the cache, and wherein the graphics processing system is configured to render the image using the generated graphics data items stored in the cache.

14. The graphics processing system of claim 1 , wherein the processing logic is SIMD processing logic configured to execute computation instances of a task in a SIMD manner.

15. The graphics processing system of claim 1 , wherein the task entries are further associated with states, wherein the task assembly unit is configured to allocate a computation instance to a task, further based on the state of the computation instance.

16. The graphics processing system of claim 1 , wherein the graphics processing system is a tile-based graphics processing system configured to use a rendering space which is subdivided into a plurality of tiles, and wherein the graphics processing system is configured to implement a geometry processing phase and a rasterisation phase;
wherein the geometry processing phase comprises: (i) receiving graphics data of input graphics data items, (ii) determining transformed positions within the rendering space of one or more primitives derived from the input graphics data items, and (iii) generating, for each of the tiles, control stream data including identifiers of input graphics data items which are to be used for rendering the tile, and primitive indications to indicate which of the primitives derived from the input graphics data items are to be used for rendering the tile; and
wherein the rasterisation phase comprises: (i) receiving the control stream data for a particular tile; and (ii) generating graphics data items for use in rasterising primitives which the primitive indications of the received control stream data indicate are to be used for rendering the tile.

17. The graphics processing system of claim 1 , wherein the task assembly unit is configured to output a particular task for execution in response to:
the particular task being full;
a new task entry for a new task being ready to be written to the task assembly unit when the task assembly unit does not have available space for a new task entry;
a further task, which has one or more dependencies on the particular task, being due to be executed; or
a flush of a rendering queue which includes a primitive to which the particular task relates.

18. A method of rendering an image in a graphics processing system, the method comprising:
storing, in a task assembly unit of the graphics processing system, a plurality of task entries for respective tasks to which computation instances can be allocated, the computation instances being for generating graphics data items for use in rendering the image, wherein a computation instance has one of the following shader types: (i) vertex shader, (ii) hull shader, (iii) domain shader, and (iv) geometry shader, and wherein the task entries are associated with shader types;
allocating, to a task, a computation instance to be executed, based on the shader type of the computation instance;
outputting one or more tasks for execution;
executing computation instances of an outputted task to thereby generate graphics data items for use in rendering the image; and
rendering the image using the generated graphics data items.

19. The method of claim 18 , wherein said rendering the image comprises:
performing transform operations on graphics data items relating to primitives to be processed for rendering;
applying hidden surface removal to remove primitive fragments which are hidden; and
applying one or both of texturing and shading to primitive fragments.

20. A non-transitory computer readable storage medium having stored thereon an integrated circuit definition dataset that, when processed in

Assignees

• Imagination Tech Ltd

Inventors

• Sansottera Andrea
• Yang Xile
• Howson John
• Redshaw Jonathan

Classifications

• G06T1/20 Primary

  Processor architectures; Processor configuration, e.g. pipelining · CPC title

• G06T15/80

  Shading · CPC title

• G06T15/005

  General purpose rendering architectures · CPC title

• G06T2210/52

  Parallel processing · CPC title

• G06T15/10

  Geometric effects · CPC title