Solid-state imaging device, driving method, and electronic equipment

Patent metadata

Field	Value
Publication number	US-10811447-B2
Application number	US-201716080153-A
Country	US
Kind code	B2
Filing date	Feb 20, 2017
Priority date	Mar 4, 2016
Publication date	Oct 20, 2020
Grant date	Oct 20, 2020

Abstract

The solid-state imaging device includes a pixel region and a circuit region. A plurality of pixels that perform photoelectric conversion are arranged in the pixel region. At least a logarithmic conversion circuit is arranged in the circuit region. The logarithmic conversion circuit reads out a pixel signal from the pixel through a logarithmic readout scheme in which the pixel signal changes approximately logarithmically in proportion to the amount of light received by the pixel. Also, the logarithmic conversion circuit can switch between a logarithmic readout scheme and a linear readout scheme when the pixel signal is read out from the pixel. The present technology is applicable, for example, to a CMOS image sensor.

First claim

The invention claimed is:

1. A solid-state imaging device comprising:
a pixel region where a plurality of pixels that perform photoelectric conversion are arranged; and
a circuit region where at least a logarithmic conversion circuit is arranged that reads out a pixel signal from the pixel through a logarithmic readout scheme in which the pixel signal changes approximately logarithmically in proportion to the amount of light received by the pixel, wherein
the pixel comprises:
a photoelectric conversion section adapted to convert incident light into an electric charge through photoelectric conversion and accumulate the electric charge;
a transfer transistor adapted to transfer the electric charge accumulated in the photoelectric conversion section;
a floating diffusion region adapted to accumulate the electric charge transferred via the transfer transistor;
an amplifying transistor adapted to output a pixel signal whose level is proportional to the electric charge accumulated in the floating diffusion region;
a selection transistor adapted to connect the first signal line and the amplifying transistor and place the pixel into a selected state for outputting a pixel signal, and
a reset transistor adapted to connect the floating diffusion region to the logarithmic conversion circuit via a second signal line, and

the pixel further comprises:
a current source included in a source follower together with the amplifying transistor; and

an AD conversion circuit adapted to perform AD conversion of the pixel signal output via the first signal line; and
further comprising:
a first switch arranged between the first and second signal lines;
a second switch arranged between the pixel and a connecting point between the first signal line and the first switch; and
a third switch arranged between a connecting point between the first signal line and the AD conversion circuit and the current source, wherein
when a pixel signal is read out from the pixel through the logarithmic readout scheme, the first switch turns ON, and the second and third switches turn OFF.

2. The solid-state imaging device of claim 1 , wherein
when a pixel signal is read out from the pixel, the logarithmic conversion circuit switches between the logarithmic readout scheme and a linear readout scheme in which a pixel signal changes approximately linearly in proportion to the amount of light received by the pixel.

3. The solid-state imaging device of claim 1 , wherein
the logarithmic conversion circuit is connected, via a given transistor, to a floating diffusion region to which an electric charge, generated by a photoelectric conversion section of the pixel, is transferred.

4. The solid-state imaging device of claim 1 , wherein
in the case where a pixel signal is read out from the pixel through the linear readout scheme, the logarithmic conversion circuit supplies a source voltage to the pixel via a switch, and
in the case where a pixel signal is read out from the pixel through the logarithmic readout scheme, the logarithmic conversion circuit supplies a source voltage to the pixel via a circuit that includes a diode-connected MOS (Metal-Oxide Semiconductor) transistor.

5. The solid-state imaging device of claim 1 , wherein
the logarithmic conversion circuits are arranged, for each column of the pixels arranged in the pixel region, in numbers proportional to the number of pixels arranged in that column.

6. The solid-state imaging device of claim 1 , wherein
the logarithmic conversion circuits are arranged one for each column of the pixels arranged in the pixel region.

7. The solid-state imaging device of claim 1 , wherein
the one logarithmic conversion circuit is arranged to correspond to a given number of the pixels arranged in the pixel region.

8. The solid-state imaging device of claim 1 including a laminated structure in which a pixel substrate on which the pixel region is formed and a circuit substrate on which the circuit region is formed are laminated one on top of the other.

9. The solid-state imaging device of claim 8 , wherein
the one logarithmic conversion circuit is arranged on the circuit substrate to correspond to the one pixel formed on the pixel substrate.

10. The solid-state imaging device of claim 8 , wherein
the one logarithmic conversion circuit is arranged on the circuit substrate to correspond to a pixel unit that includes the plurality of pixels formed on the pixel substrate.

11. The solid-state imaging device of claim 1 , wherein
in the pixel region, the pixels based on the linear readout scheme and the pixels based on the logarithmic readout scheme are arranged column by column through the pixels.

12. The solid-state imaging device of claim 1 , wherein
in the pixel region, the pixels based on the linear readout scheme and the pixels based on the logarithmic readout scheme are arranged row by row through the pixels.

13. The solid-state imaging device of claim 1 , wherein
in the pixel region, the pixels based on the linear readout scheme and the pixels based on the logarithmic readout scheme are arranged alternately column by column and row by row.

14. The solid-state imaging device of claim 1 , wherein
in the pixel region, the pixels based on the linear readout scheme and the pixels based on the logarithmic readout scheme are arranged one for each pixel unit that includes the plurality of pixels.

15. The solid-state imaging device of claim 1 , wherein
a pixel signal is read out through the logarithmic readout scheme during automatic exposure operation for image capture and a pixel signal is read out through the linear readout scheme during image capture.

16. The solid-state imaging device of claim 1 , wherein
the pixel comprises:
a photoelectric conversion section adapted to convert incident light into an electric charge through photoelectric conversion and accumulate the electric charge; and
a selection transistor adapted to connect a first signal line and the photoelectric conversion section so as to place the pixel into a selected state for outputting a pixel signal,

the pixel further comprises:
an AD conversion circuit adapted to perform AD (Analog to Digital) conversion of the pixel signal output via the first signal line, and

the photoelectric conversion section is directly connected to the logarithmic conversion circuit via a second signal line.

17. The solid-state imaging device of claim 16 , wherein
the logarithmic conversion circuits are arranged, for each column of the pixels arranged in the pixel region, in numbers proportional to the number of pixels arranged in that column.

18. The solid-state imaging device of claim 17 , wherein
the plurality of logarithmic conversion circuits connected to the pixels arranged in a column in the pixel region share a switch for resetting electric charges generated by the pixels.

19. The solid-state imaging device of claim 1 , wherein
when a pixel signal is read out from the pixel through a linear readout scheme in which the pixel signal changes approximately linearly in proportion to the amount of light received by the pixel, the first switch turns OFF, and the second and third switches turn ON.

20. Electronic equipment comprising:
a solid-state imaging device, the solid-state imaging device including
a pixel region where a plurality of pixels that perform photoelectric conversion are arranged, and

a circuit region where at least a logarithmic conversion circuit is arranged that reads out a pixel signal from the pixe

Assignees

• Sony Corp

Inventors

• Hanzawa Katsuhiko
• Kaji Yuuichi

Classifications

• H04N25/575

  with a response composed of multiple slopes · CPC title

• H04N25/77

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• H04N25/573

  the logarithmic type · CPC title

• H04N25/79

  Arrangements of circuitry being divided between different or multiple substrates, chips or circuit boards, e.g. stacked image sensors · CPC title

• H04N25/57 Primary

  Control of the dynamic range · CPC title