Baseboard management controllers for server chassis

Patent metadata

Field	Value
Publication number	US-10810085-B2
Application number	US-201715640234-A
Country	US
Kind code	B2
Filing date	Jun 30, 2017
Priority date	Jun 30, 2017
Publication date	Oct 20, 2020
Grant date	Oct 20, 2020

Abstract

A server chassis includes a plurality of microservers with each microserver including a Micro Baseboard Management Controller (μBMC) and at least one processor for controlling operation of the microserver. A BMC communication manager of the server chassis directly communicates with each μBMC of the plurality of micro-servers. A Chassis BMC (CBMC) connects to the BMC communication manager and communicates with the BMC communication manager via a plurality of communication protocols. The BMC communication manager translates at least one of the plurality of protocols to a different protocol for direct communication with each μBMC. According to one aspect, a μBMC is connected to an out-of-band port of a microserver for communicating with at least one processor of the microserver. According to another aspect, the BMC communication manager includes at least one CBMC connector for communicating with the CBMC, and a plurality of μBMC ports for communicating directly with a respective μBMC.

First claim

What is claimed is:

1. A server chassis, comprising:
a plurality of microservers, each microserver including a Micro Baseboard Management Controller (μBMC);
a Baseboard Management Controller (BMC) communication manager configured to directly communicate with each μBMC of the plurality of micro-servers; and
a Chassis Baseboard Management Controller (CBMC) directly connected to the BMC communication manager via a plurality of protocols and configured to communicate with the BMC communication manager via the plurality of protocols,
wherein the BMC communication manager is further configured to translate:
at least one of the plurality of protocols to a different protocol comprising Universal Asynchronous Receiver/Transmitter (UART) full duplex for direct communication with each μBMC of the plurality of microservers; and

wherein each μBMC of the plurality of microservers is configured to:
receive an instruction from the CBMC via the BMC communication manager; and
in response to the received instruction, perform at least one of modifying a Basic Input/Output System (BIOS) of a respective microserver, configuring a microserver setting for network booting or for local booting of the respective microserver, setting the respective microserver to boot in a diagnostic mode, setting the respective microserver to act as a boot server for other microservers, setting the respective microserver to act as a Dynamic Host Configuration Protocol (DHCP) server for other microservers, and setting the respective microserver to act as a Network Time Protocol (NTP) server for other microservers.

2. The server chassis of claim 1 , wherein the BMC communication manager is individually connected to each microserver of the plurality of microservers.

3. The server chassis of claim 1 , wherein the BMC communication manager includes at least one CBMC connector, and wherein the CBMC is further configured to select communication with one or more μBMCs of the plurality of microservers via the at least one CBMC connector.

4. The server chassis of claim 1 , wherein each microserver of the plurality of microservers includes an out-of-band port, and wherein each μBMC is connected to a respective out-of-band port of the plurality of microservers.

5. The server chassis of claim 1 , wherein each μBMC of the plurality of microservers is connected to at least one power controller of a respective microserver, and wherein each μBMC is further configured to:
receive a power instruction from the CBMC via the BMC communication manager; and
change a power state of the microserver based on the received power instruction.

6. The server chassis of claim 1 , wherein each μBMC is further configured to remain powered on after a remainder of the microserver has powered off.

7. The server chassis of claim 6 , wherein each μBMC includes a memory configured to store information about the microserver, and wherein when the remainder of the microserver is shutdown, the μBMC is further configured to:
receive a request for information about the microserver from the CBMC via the BMC communication manager;
read the requested information from the memory of the μBMC; and
send the requested information to the CBMC via the BMC communication manager.

8. The server chassis of claim 1 , wherein each microserver of the plurality of microservers include a visual indicator device controlled by a respective μBMC to visually indicate a condition of the microserver.

9. The server chassis of claim 1 , wherein the CBMC is further configured to:
receive a fault condition for a microserver of the plurality of microservers from the BMC communication manager, wherein the fault condition is received by the BMC communication manager from a μBMC of the microserver; and
send the fault condition to a remote device external to the server chassis.

10. A microserver, comprising:
at least one processor configured to control operation of the microserver;
at least one data port configured to send and receive data on a network;
an out-of-band port for external management of the microserver; and
a Micro Baseboard Management Controller (μBMC) connected to the out-of-band port and configured to:
communicate with a Chassis Baseboard Management Controller (CBMC) in a full duplex mode, the CBMC configured to communicate with a plurality of microservers;
communicate with the at least one processor through the out-of-band port;
remain powered on after a remainder of the microserver has powered off;
receive an instruction from the CBMC; and
in response to the received instruction, perform at least one of modifying a Basic Input/Output System (BIOS) of the microserver, configuring a microserver setting for network booting or for local booting of the respective microserver, setting the microserver to boot in a diagnostic mode, setting the microserver to act as a boot server for other microservers, setting the microserver to act as a Dynamic Host Configuration Protocol (DHCP) server for other microservers, and setting the microserver to act as a Network Time Protocol (NTP) server for other microservers.

11. The microserver of claim 10 , wherein the μBMC is further configured to communicate with the CBMC through a Baseboard Management Controller (BMC) communication manager external to the microserver, and wherein the microserver is directly connected to the BMC communication manager.

12. The microserver of claim 11 , wherein the μBMC is further configured to communicate with BMC communication manager using Universal Asynchronous Receiver/Transmitter (UART) full duplex.

13. The microserver of claim 10 , wherein the μBMC is further configured to communicate with the at least one processor using UART.

14. The microserver of claim 10 , further comprising:
at least one power controller for controlling a power supply to one or more components of the microserver; and
wherein the μBMC is connected to the at least one power controller and further configured to:
receive a power instruction from the CBMC; and
control the at least one power controller to change a power state of the microserver based on the received power instruction.

15. The microserver of claim 10 , further comprising:
a Data Storage Device (DSD) for storing data received via the at least one data port; and
a power controller connected to the μBMC and to the DSD, the power controller configured to supply power to the DSD; and
wherein the μBMC is further configured to:
receive a power instruction from the CBMC; and
control the power controller to change a power state of the DSD based on the received power instruction.

16. The microserver of claim 10 , wherein the μBMC includes a memory configured to store information about the microserver, and wherein when the remainder of the microserver is powered off, the μBMC is further configured to:
receive a request for information about the microserver from the CBMC;
read the requested information from the memory of the μBMC; and
send the requested information to the CBMC.

17. The microserver of claim 10 , further comprising a visual indicator device, and wherein the μBMC is further configured to control the visual indicator device to visually indicate a condition of the microserver.

18. The microserver of claim 10 , wherein the at least one processor is further configured to send an indication of a fault condition of the microserver to the BMC communication manager through the μBMC.

19. A Baseboard Management Controller (BMC) communication manager, comprising:
a plurality of Chassis Baseboard M

Assignees

• Western Digital Tech Inc

Inventors

• Ryan Robert P
• Jenkins Dean M
• Lee Eric

Classifications

• G06F13/20 Primary

  for access to input/output bus · CPC title

• G06F11/3058

  Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations (thermal management in cooling arrangements of a computing system G06F1/206) · CPC title

• G06F2201/805

  Real-time · CPC title

• G06F11/1441 Primary

  Resetting or repowering · CPC title

• G06F1/3253

  Power saving in bus · CPC title