Pixel circuit and high-brightness display device

Patent metadata

Field	Value
Publication number	US-10803794-B2
Application number	US-201916239606-A
Country	US
Kind code	B2
Filing date	Jan 4, 2019
Priority date	Sep 5, 2018
Publication date	Oct 13, 2020
Grant date	Oct 13, 2020

Abstract

A high-brightness display device includes a plurality of pixel circuits and a driving line. The driving line is configured to provide a first data signal and a second data signal to a column of pixel circuits of the plurality of pixel circuits. When the high-brightness display device is operated in a normal mode, the first data signal is a DC signal and the second data signal is an AC signal, and a driving current of a pixel circuit of the column of pixel circuits has a first maximum current value. When the high-brightness display device is operated in a high-brightness mode, the first data signal and the second data signal are both the AC signals, and the driving current of the pixel circuit have a second maximum current value. The second maximum current value is larger than the first maximum current value.

First claim

What is claimed is:

1. A pixel circuit, comprising:
a driving transistor, comprising a first node, a second node, and a control node, wherein the first node of the driving transistor is coupled with a first node point, and the second node of the driving transistor is coupled with a second node point, and the control node of the driving transistor is coupled with a third node point;
a compensation circuit, coupled with the first node point and the third node point, and configured to control the driving transistor to generate a driving current;
a writing circuit, configured to receive a first data signal and a second data signal from a driving line, and to selectively provide the first data signal and the second data signal to the compensation circuit, wherein when the compensation circuit receives the first data signal, the compensation circuit renders a first node point voltage of the first node point positively correlated with an absolute value of a threshold voltage of the driving transistor;
an emission control circuit, configured to apply a system high voltage to the first node point;
a reset circuit, coupled with the second node point and the third node point, and configured to reset a second node point voltage of the second node point and a third node point voltage of the third node point; and
a light emitting element, configured to generate corresponding luminance according to the driving current,
wherein the first data signal and the second data signal are AC signals, and magnitude of the driving current is negatively correlated with a sum of a voltage level of the first data signal and a voltage level of the second data signal received by the pixel circuit.

2. The pixel circuit of claim 1 , wherein the compensation circuit comprises:
a first switch, comprising a first node, a second node, and a control node, wherein the first node of the first switch is coupled with the first node point, the second node of the first switch is coupled with a fourth node point, and the control node of the first switch is configured to receive a first control signal;
a second switch, comprising a first node, a second node, and a control node, wherein the first node of the second switch is coupled with the third node point, the second node of the second switch is coupled with a fifth node point, and a control node of the second switch is configured to receive a second control signal; and
a first capacitor element, coupled with between the fourth node point and the fifth node point.

3. The pixel circuit of claim 2 , wherein the writing circuit comprises:
a third switch, comprising a first node, a second node, and a control node, wherein the first node of the third switch is coupled with the fourth node point, the second node of the third switch is coupled with the driving line, and the control node of the third switch is configured to receive a third control signal; and
a fourth switch, comprising a first node, a second node, and a control node, wherein the first node of the fourth switch is coupled with the fifth node point, the second node of the fourth switch is coupled with the driving line, and the control node of the fourth switch is configured to receive the first control signal.

4. The pixel circuit of claim 3 , wherein the emission control circuit comprises:
a fifth switch, comprising a first node, a second node, and a control node, wherein the first node of the fifth switch is configured to receive the system high voltage, the second node of the fifth switch is coupled with the first node point, and the control node of the fifth switch is configured to receive an emission control signal; and
a second capacitor element, comprising a first node and a second node, wherein the first node of the second capacitor element is configured to receive the system high voltage, the second node of the second capacitor element is coupled with the fourth node point.

5. The pixel circuit of claim 4 , wherein during a reset stage, the first control signal and the emission control signal have an enabling voltage level, and the second control signal and the third control signal having a disabling voltage level,
wherein during a compensation stage, the first control signal has the enabling voltage level, and the second control signal, the third control signal, and the emission control signal have the disabling voltage level,
wherein during a writing stage, the second control signal, the third control signal, and the emission control signal have the enabling voltage level, and the first control signal has the disabling voltage level,
wherein during a emission stage, the second control signal and the emission control signal have the enabling voltage level, and the first control signal and the third control signal have the disabling voltage level.

6. The pixel circuit of claim 2 , wherein the reset circuit comprises:
a sixth switch, comprising a first node, a second node, and a control node, wherein the first node of the sixth switch is coupled with the third node point, the second node of the sixth switch is configured to receive a first reference voltage, and the control node of the sixth switch is configured to receive the first control signal; and
a seventh switch, comprising a first node, a second node, and a control node, the first node of the seventh switch is configured to receive a second reference voltage, the second node of the seventh switch is coupled with the second node point and a first node of the light emitting element.

7. The pixel circuit of claim 1 , wherein the compensation circuit comprises:
a first switch, comprising a first node, a second node, and a control node, wherein the first node of the first switch is coupled with the first node point, the second node of the first switch is coupled with a fourth node point, and the control node of the first switch is configured to receive a first control signal;
a second switch, comprising a first node, a second node, and a control node, wherein the first node of the second switch is coupled with the third node point, the second node of the second switch is coupled with a fifth node point, and the control node of the second switch is configured to receive a emission control signal; and
a first capacitor element, coupled between the fourth node point and the fifth node point;
wherein the emission control circuit comprises:
a third switch, comprising a first node, a second node, and a control node, wherein the first node of the third switch is configured to receive the system high voltage, the second node of the third switch is coupled with the first node point, and the control node of the third switch is configured to receive the emission control signal; and
a second capacitor element, comprising a first node and a second node, wherein the first node of the second capacitor element is configured to receive the system high voltage, and the second node of the second capacitor element is coupled with the fourth node point.

8. The pixel circuit of claim 1 , wherein the compensation circuit comprises:
a P-type transistor, comprising a first node, a second node, and a control node, wherein the first node of the P-type transistor is coupled with the first node point, the second node of the P-type transistor is coupled with a fourth node point, and the control node of the P-type transistor is configured to receive a first control signal;
an N-type transistor, comprising a first node, a second node, and a control node, the first node of the N-type transistor is coupled with the third node point, the second node of the N-type transistor is coupled with a fifth node point, and the control node of the N-type transistor is configured to receive the first control signal; and
a first capacitor element, coup

Assignees

• Au Optronics Corp

Inventors

• Cheng Mao-Hsun

Classifications

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G2320/045

  Compensation of drifts in the characteristics of light emitting or modulating elements · CPC title

• G09G3/3225 Primary

  using an active matrix · CPC title

• G09G3/32

  semiconductive, e.g. using light-emitting diodes [LED] · CPC title

• G09G2300/0819

  used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title