Thin-film transistor array substrate
US-2017330938-A1 · Nov 16, 2017 · US
US10797146B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10797146-B2 |
| Application number | US-201916293560-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 5, 2019 |
| Priority date | May 4, 2018 |
| Publication date | Oct 6, 2020 |
| Grant date | Oct 6, 2020 |
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A thin film transistor substrate includes: a substrate; an oxide semiconductor layer disposed on the substrate; a gate electrode disposed on the substrate; a gate insulating layer interposed between the oxide semiconductor layer and the gate electrode; and a source electrode and a drain electrode connected to the oxide semiconductor layer, the source electrode and the drain electrode being spaced apart from each other. The gate insulating layer includes: a first gate insulating layer having an oxygen content lower than that of a stoichiometric composition; and a second gate insulating layer including a material substantially the same as a material which the first gate insulating layer may include, and having an oxygen content higher than that of the first gate insulating layer, and the first gate insulating layer and the oxide semiconductor layer directly contact each other.
Opening claim text (preview).
What is claimed is: 1. A thin film transistor substrate comprising: a substrate; an oxide semiconductor layer on the substrate; a gate electrode on the substrate; a gate insulating layer between the oxide semiconductor layer and the gate electrode; and a source electrode and a drain electrode both connected to the oxide semiconductor layer, the source electrode and the drain electrode being spaced apart from each other, wherein the gate insulating layer comprises: a first gate insulating layer comprising a first material and having an oxygen content lower than that of a stoichiometric composition of the first material; and a second gate insulating layer comprising a second material substantially the same as the first material, and having an oxygen content higher than that of the first gate insulating layer, and the first gate insulating layer and the oxide semiconductor layer directly contact each other. 2. The thin film transistor substrate of claim 1 , wherein the first gate insulating layer comprises a metal oxide or a metal oxynitride that has an oxygen content lower than that of the stoichiometric composition. 3. The thin film transistor substrate of claim 1 , wherein the first gate insulating layer comprises one or more materials selected from: SiO x (0<x<2), AlO x (0<x<3/2), ZnO x (0<x<l), ZrO x (0<x<2), HfO x (0<x<2), GaO x (0<x<3/2), TiO x (0<x<2), TaO x (0<x<3/2), MnO x (0<x<2), LaO x (0<x<3/2), SiO x Ny (0<x<1, 0<y<2/3, and 0<x+y<5/3), AlO x Ny (0<x<3/4, 0<y<1/2, and 0<x+y<5/4), and GaO x Ny (0<x<3/4, 0<y<1/2, and 0<x+y<5/4). 4. The thin film transistor substrate of claim 1 , wherein the first gate insulating layer comprises silicon oxide represented by SiO x , where 0<x<2, and an atomic weight ratio O/Si of oxygen to silicon in the silicon oxide is substantially equal to or more than about 1.5 and less than about 2.0. 5. The thin film transistor substrate of claim 4 , wherein the atomic weight ratio O/Si in the silicon oxide decreases along a thickness direction as a distance from the oxide semiconductor layer decreases. 6. The thin film transistor substrate of claim 1 , wherein the first gate insulating layer has an excess hydrogen content of about 5.0×10 20 atoms/cm 3 . 7. The thin film transistor substrate of claim 1 , wherein the first gate insulating layer has a hydrogen content that varies along a thickness direction of the first gate insulating layer. 8. The thin film transistor substrate of claim 1 , wherein the first gate insulating layer has a thickness substantially equal to or less than about 500 Å. 9. The thin film transistor substrate of claim 1 , wherein the gate insulating layer further comprises a third gate insulating layer comprising a third material different from the first material. 10. The thin film transistor substrate of claim 9 , wherein the third gate insulating layer is an oxide-based insulating layer, an oxynitride-based insulating layer, or a nitride-based insulating layer. 11. The thin film transistor substrate of claim 1 , wherein the oxide semiconductor layer comprises a metal oxide semiconductor comprising oxygen, and has a density of oxygen defects of about 2.0×10 17 cm −3 eV −1 . 12. The thin film transistor substrate of claim 1 , wherein the oxide semiconductor layer comprises at least one selected from: indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). 13. The thin film transistor substrate of claim 1 , comprising: the substrate; the oxide semiconductor layer on the substrate; the first gate insulating layer on the oxide semiconductor layer; the second gate insulating layer on the first gate insulating layer; the gate electrode on the second gate insulating layer; and the source electrode and the drain electrode both connected to the oxide semiconductor layer, the source electrode and the drain electrode being spaced apart from each other. 14. The thin film transistor substrate of claim 1 , comprising: the substrate; the gate electrode on the substrate; the second gate insulating layer on the gate electrode; the first gate insulating layer on the second gate insulating layer; the oxide semiconductor layer on the first gate insulating layer; and the source electrode and the drain electrode both connected to the oxide semiconductor layer, the source electrode and the drain electrode being spaced apart from each other.
characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes · CPC title
having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device · CPC title
of thin-film transistors [TFT] · CPC title
Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title
having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs · CPC title
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