Embedded multi-device bridge with through-bridge conductive via signal connection

Patent metadata

Field	Value
Publication number	US-10797000-B2
Application number	US-201916254126-A
Country	US
Kind code	B2
Filing date	Jan 22, 2019
Priority date	Feb 26, 2014
Publication date	Oct 6, 2020
Grant date	Oct 6, 2020

Abstract

A microelectronic structure includes a substrate having a first surface and a cavity extending into the substrate from the substrate first surface, a first microelectronic device and a second microelectronic device attached to the substrate first surface, and a bridge disposed within the substrate cavity and attached to the first microelectronic device and to the second microelectronic device. The bridge includes a plurality conductive vias extending from a first surface to an opposing second surface of the bridge, wherein the conductive vias are electrically coupled to deliver electrical signals from the substrate to the first microelectronic device and the second microelectronic device. The bridge further creates at least one electrical signal connection between the first microelectronic device and the second microelectronic device.

First claim

What is claimed is:

1. A microelectronic structure comprising:
a microelectronic substrate having a cavity, wherein the microelectronic substrate includes a plurality of conductive routes extending from a first surface of the microelectronic substrate and a plurality of conductive routes extending into the microelectronic substrate from a bottom surface of the cavity;
a bridge disposed within the cavity, wherein the bridge has a plurality of signal lines, wherein the bridge has a plurality of through-bridge conductive vias extending from the first surface of the bridge to a second surface of the bridge, and wherein at least one through-bridge conductive vias of the plurality of through-bridge conductive vias is electrically connected to at least one conductive route of the plurality of conductive routes at the bottom surface of the cavity;
a first microelectronic device, wherein the first microelectronic device is electrically attached to at least one conductive route of the plurality of conductive routes extending from a first surface of the microelectronic substrate, wherein the first microelectronic device is electrically attached to at least one signal line of the plurality of the signal lines, and wherein the first microelectronic device is electrically attached to at least one through-bridge conductive via of the plurality of through-bridge conductive vias; and
a second microelectronic device, wherein the second microelectronic device is electrically attached to at least one conductive route of the plurality of conductive routes extending from a first surface of the microelectronic substrate, wherein the second microelectronic device is electrically attached to at least one signal line of the plurality of the signal lines, and wherein the second microelectronic device is electrically attached at least one through-bridge conductive via of the plurality of through-bridge conductive vias;
wherein the first microelectronic device is electrically connected to the second microelectronic device through at least one signal line of the plurality of signal lines of the bridge.

2. The microelectronic structure of claim 1 , wherein the bridge comprises silicon.

3. The microelectronic structure of claim 1 , wherein the bridge comprises an active device.

4. The microelectronic structure of claim 1 , wherein the bridge comprises a substrate having an interconnection layer on a first surface thereof, wherein the interconnection layer comprises at least one dielectric layer formed on the first surface of the substrate, and the plurality of bridge signal lines are formed in or on the at least one dielectric layer.

5. The microelectronic structure of claim 4 , wherein the bridge comprises silicon.

6. The microelectronic structure of claim 4 , wherein the bridge comprises an active device.

7. The microelectronic structure of claim 4 , further comprising a dielectric liner disposed between the through-bridge conductive vias and the substrate and between the through-bridge conductive vias and the interconnection layer.

8. A computing device, comprising:
a board;
a microelectronic device attached to the board; and
a microelectronic structure disposed within the microelectronic device, wherein the microelectronic structure comprises:
a microelectronic substrate having a cavity, wherein the microelectronic substrate includes a plurality of conductive routes extending from a first surface of the microelectronic substrate and a plurality of conductive routes extending into the microelectronic substrate from a bottom surface of the cavity;
a bridge disposed within the cavity, wherein the bridge has a plurality of signal lines, wherein the bridge has a plurality of through-bridge conductive vias extending from the first surface of the bridge to a second surface of the bridge, and wherein at least one through-bridge conductive vias of the plurality of through-bridge conductive vias is electrically connected to at least one conductive route of the plurality of conductive routes at the bottom surface of the cavity;

a first microelectronic device, wherein the first microelectronic device is electrically attached to at least one conductive route of the plurality of conductive routes extending from a first surface of the microelectronic substrate, wherein the first microelectronic device is electrically attached to at least one signal line of the plurality of the signal lines, and wherein the first microelectronic device is electrically attached to at least one through-bridge conductive via of the plurality of through-bridge conductive vias; and
a second microelectronic device, wherein the second microelectronic device is electrically attached to at least one conductive route of the plurality of conductive routes extending from a first surface of the microelectronic substrate, wherein the second microelectronic device is electrically attached to at least one signal line of the plurality of the signal lines, and wherein the second microelectronic device is electrically attached at least one through-bridge conductive via of the plurality of through-bridge conductive vias;
wherein the first microelectronic device is electrically connected to the second microelectronic device through at least one signal line of the plurality of signal lines of the bridge.

9. The computing device of claim 8 , wherein the bridge comprises silicon.

10. The computing device of claim 8 , wherein the bridge comprises an active device.

11. The computing device of claim 8 , wherein the bridge comprises a substrate having an interconnection layer on a first surface thereof, wherein the interconnection layer comprises at least one dielectric layer formed on the first surface of the substrate, and the plurality of bridge signal lines are formed in or on the at least one dielectric layer.

12. The computing device of claim 11 , wherein the bridge comprises silicon.

13. The computing device of claim 11 , wherein the bridge comprises an active device.

14. The computing device of claim 11 , further comprising a dielectric liner disposed between the through-bridge conductive vias and the substrate and between the through-bridge conductive vias and the interconnection layer.

Assignees

• Intel Corp

Inventors

• Deshpande Nitin A
• Karhade Omkar G

Classifications

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W90/297

  characterised by the through-semiconductor vias [TSVs] in the stacked chips · CPC title

• H10W72/07252

  changes in structures or sizes · CPC title