Pixel driving circuit having dual driver unit, driving method for the same and display panel

US10796635B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10796635-B2
Application numberUS-201816152263-A
CountryUS
Kind codeB2
Filing dateOct 4, 2018
Priority dateDec 4, 2017
Publication dateOct 6, 2020
Grant dateOct 6, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure relates to a pixel driving circuit and a driving method for the same and a display panel. The pixel driving circuit includes a driver unit, a circuit switching unit, and a storage capacitor unit. The driver unit includes a first sub-driver unit and a second sub-driver unit. The circuit switching unit has a first switching unit and a second switching unit. Two terminals of the first switching unit are electrically connected to a first terminal of the light emitting unit and the first sub-driver unit, respectively, two terminals of the second switching unit are electrically connected to the light emitting unit and the second sub-driver unit, respectively, and the circuit switching unit is configured to switch conductive states of the first switching unit and the second switching unit.

First claim

Opening claim text (preview).

What is claimed is: 1. A pixel driving circuit comprising: a driver unit; a circuit switching unit; and a storage capacitor unit, wherein: the driver unit comprises a first sub-driver unit and a second sub-driver unit and; the circuit switching unit has a first switching unit and a second switching unit, wherein two terminals of the first switching unit are electrically connected to a first terminal of a light emitting unit and the first sub-driver unit, respectively; two terminals of the second switching unit are electrically connected to the light emitting unit and the second sub-driver unit, respectively; and the circuit switching unit is configured to switch conductive states of the first switching unit and the second switching unit, wherein: the pixel driving circuit further comprises a switching unit; the storage capacitor unit comprises a first capacitor and a second capacitor; the switching unit comprises a first data writing unit and a second data writing unit; the first data writing unit and a gate of the first sub-driver unit are connected via the first capacitor; and the second data writing unit and a gate of the second sub-driver unit are connected via the second capacitor, wherein the pixel driving circuit n comprises: a data terminal connected to a first electrode of the first data writing unit and a first electrode of the second data writing unit; a first control terminal connected to a gate of the first data writing unit; a second control terminal connected to a gate of the second data writing unit; a third control terminal connected to a gate of the first switching unit; a fourth control terminal connected to a gate of the second switching unit; a first level signal input terminal connected to a second terminal of the light emitting unit; and a second level signal input terminal connected to a first electrode of the first sub-driver unit and a first electrode of the second sub-driver unit, wherein: a second electrode of the first sub-driver unit is connected to a first electrode of the first switching unit; a second electrode of the second sub-driver unit is connected to a first electrode of the second switching unit; a second electrode of the first switching unit is connected to the first terminal of the light emitting unit; and a second electrode of the second switching unit is connected to the first terminal of the light emitting unit, wherein the pixel driving circuit further comprises a first charging unit and a first discharging unit, and wherein: the first charging unit has a first charging switch, and two terminals of the first charging switch are connected to a charging circuit and a first terminal of the first capacitor, respectively; and the first discharging unit has a first discharging switch, and two terminals of the first discharging switch are connected to a discharging circuit and a second terminal of the first capacitor. 2. The pixel driving circuit according to claim 1 , wherein the first sub-driver unit and the second sub-driver unit are thin film transistors. 3. The pixel driving circuit according to claim 1 , wherein: a gate of the first charging unit is connected to the second control terminal, a first electrode of the first charging unit is connected to the first electrode of the first switching unit, and a second electrode of the first charging unit is connected to the first terminal of the first capacitor; and a gate of the first discharging unit is connected to the second control terminal, a first electrode of the first discharging unit is connected to a second terminal of the first capacitor, and a second electrode of the first discharging unit is connected to a common ground. 4. The pixel driving circuit according to claim 1 , further comprising a second charging unit and a second discharging unit, wherein: the second charging unit has a second charging switch, and two terminals of the second charging switch are connected to a charging circuit and a first terminal of the second capacitor, respectively; and the second discharging unit has a second discharging switch, and two terminals of the second discharging switch are connected to a discharging circuit and a second terminal of the second capacitor. 5. The pixel driving circuit according to claim 4 , wherein: a gate of the second charging unit is connected to the first control terminal, a first electrode of the second charging unit is connected to the first electrode of the second switching unit, and a second electrode of the second charging unit is connected to a first terminal of the second capacitor; and a gate of the second discharging unit is connected to the first control terminal, a first electrode of the second discharging unit is connected to a second terminal of the second capacitor, and a second electrode of the second discharging unit is connected to a common ground. 6. The pixel driving circuit according to claim 1 , wherein the first sub-driver unit and the second sub-driver unit are P-type thin film transistors, a signal input to the first level signal input terminal is a high level signal, and a signal input to the second level signal input terminal is a low level signal. 7. A driving method for the pixel driving circuit according to claim 1 , comprising: in a first writing stage, inputting a high level signal to the first control terminal to make the first data writing unit in a conductive state, and to transmit a data signal at the data terminal to the first capacitor; in a first driving stage, inputting a high level signal to the third control terminal to make the first switching unit in a conductive state, inputting a low high level signal to the fourth control terminal to make the second switching unit in a non-conductive state, and driving the light emitting unit to emit light by the first sub-driver unit; in a second writing stage, inputting a high level signal to the second control terminal to make the second data writing unit in a conductive state, and to transmit the data signal at the data terminal to the second capacitor; and in a second driving stage, inputting a high level signal to the fourth control terminal to make the second switching unit in a conductive state, inputting a low level signal to the third control terminal to make the first switching unit in a non-conductive state, and driving the light emitting unit to emit light by the second sub-driver unit. 8. The method according to claim 7 , wherein: a gate of the first charging unit is connected to the second control terminal, a first electrode of the first charging unit is connected to the first electrode of the first switching unit, and a second electrode of the first charging unit is connected to the first terminal of the first capacitor; and a gate of the first discharging unit is connected to the second control terminal, a first electrode of the first discharging unit is connected to a second terminal of the first capacitor, and a second electrode of the first discharging unit is connected to a common ground, and wherein, in the second writing stage, the method further comprises: inputting a high level signal to the second control terminal, and at the same time inputting a high level signal to the third control terminal to make the first charging unit in a conductive state and the first discharging unit in a conductive state and to charge the first capacitor; and inputting a low level signal to the third control terminal to make the first switching unit in a non-conductive state to discharge the first capacitor until a voltage across the first and second terminals of the first capacitor is dropped to a threshold voltage of the first sub-driver unit, and wherein, in the second driving stage, the method further comprises:

Assignees

Inventors

Classifications

  • Preventing or counteracting the effects of ageing · CPC title

  • with level shifting · CPC title

  • Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared · CPC title

  • Details of driving circuits · CPC title

  • Details of drivers for scan electrodes · CPC title

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What does patent US10796635B2 cover?
The present disclosure relates to a pixel driving circuit and a driving method for the same and a display panel. The pixel driving circuit includes a driver unit, a circuit switching unit, and a storage capacitor unit. The driver unit includes a first sub-driver unit and a second sub-driver unit. The circuit switching unit has a first switching unit and a second switching unit. Two terminals of…
Who is the assignee on this patent?
Boe Technology Group Co Ltd, Hefei Xinsheng Optoelectronics Technology Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3225. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 06 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).