Optocoupler emulating input stage for digital isolators

Patent metadata

Field	Value
Publication number	US-10790782-B2
Application number	US-201816223545-A
Country	US
Kind code	B2
Filing date	Dec 18, 2018
Priority date	Oct 12, 2018
Publication date	Sep 29, 2020
Grant date	Sep 29, 2020

Abstract

A digital isolator comprising a set of bipolar transistors and an inductor capacitor (LC) oscillator coupled to the set of bipolar transistors in series, wherein the LC oscillator is configured to be turned on and off based on the current applied to the set of bipolar transistors or the LC oscillator and generate a set of differential signals based on the current flowing through the set of bipolar transistors and mimicking the operational characteristics of an optocoupler.

First claim

What is claimed is:

1. A diode emulating oscillator comprising:
a first set of bipolar junction transistors coupled in series;
an inductor capacitor (LC) oscillator coupled to the first set of bipolar junction transistors in parallel; and
a current mirror transistor coupled to the LC oscillator and the first set of bipolar junction transistors,
wherein a collector of the current mirror transistor is coupled to the LC oscillator and a base of the current mirror transistor is coupled to a base of one of the first set of bipolar transistors, and

when a current flows through the first set of bipolar junction transistors, the current mirror transistor is configured to flow a current proportional to the current flowing through the first set of bipolar junction transistors and the LC oscillator is configured to generate a modulated signal based on the current flowing through the current mirror transistor;
wherein a current gain value of the current mirror transistor in relation to a current gain value of a transistor of the first set of transistors is adjustable.

2. A diode emulating oscillator comprising:
a first set of bipolar junction transistors coupled in series;
an inductor capacitor (LC) oscillator coupled to the first set of bipolar junction transistors in parallel; and
a current mirror transistor coupled to the LC oscillator and the first set of bipolar junction transistors,
wherein a collector of the current mirror transistor is coupled to the LC oscillator and a base of the current mirror transistor is coupled to a base of one of the first set of bipolar transistors, and

when a current flows through the first set of bipolar junction transistors, the current mirror transistor is configured to flow a current proportional to the current flowing through the first set of bipolar junction transistors and the LC oscillator is configured to generate a modulated signal based on the current flowing through the current mirror transistor;
wherein the LC oscillator comprises an inductor capacitor (LC) tank circuit, and a set of transistors coupled to the LC tank circuit,
wherein the LC tank circuit comprises an inductor, and a capacitor coupled to the inductor in parallel, and the set of transistors comprises a first pair of cross coupled NMOS transistors and a second pair of cross coupled PMOS transistors,
wherein a drain of a first transistor of the first pair of cross coupled NMOS transistors is coupled to a first end of the LC tank circuit and a drain of a second transistor of the first pair of cross coupled NMOS transistors is coupled to a second end the LC tank circuit,
wherein sources of the first and second transistors of the first pair of cross coupled NMOS transistors are coupled to the collector of the current mirror transistor,
wherein a drain of a first transistor of the second pair of cross coupled PMOS transistors is coupled to the first end of the LC tank circuit and a drain of a second transistor of the second pair of cross coupled PMOS transistors is coupled to the second end the LC tank circuit, and
wherein sources of the first and second transistors of the second pair of cross coupled PMOS transistors are coupled to an end of the first set of bipolar junction transistor configured to receive input current or voltage.

3. A diode emulating oscillator comprising:
a first set of bipolar junction transistors coupled in series;
an inductor capacitor (LC) oscillator coupled to the first set of bipolar junction transistors in parallel; and
a current mirror transistor coupled to the LC oscillator and the first set of bipolar junction transistors,
wherein a collector of the current mirror transistor is coupled to the LC oscillator and a base of the current mirror transistor is coupled to a base of one of the first set of bipolar transistors, and
when a current flows through the first set of bipolar junction transistors, the current mirror transistor is configured to flow a current proportional to the current flowing through the first set of bipolar junction transistors and the LC oscillator is configured to generate a modulated signal based on the current flowing through the current mirror transistor; and
a spread spectrum module coupled to the LC oscillator, wherein the spread spectrum module comprises a capacitor coupled to the LC oscillator and is configured to adjust the frequency of the modulated signal;
wherein a voltage over the first set of bipolar junction transistors is configured to supply power to activate the spread spectrum module.

4. A digital isolator comprising:
a diode emulating oscillator configured to generate a modulated signal;
an isolation barrier configured to transmit the modulated signal via a channel; and
a receiver configured to receive and demodulate the modulated signal,
wherein the diode emulating oscillator comprises a set of bipolar junction transistors coupled in series, and an inductor capacitor (LC) oscillator coupled to the set of bipolar junction transistors in parallel, and
wherein the LC oscillator is configured to generate the modulated signal when a current flows through the set of bipolar junction transistors;
wherein the diode emulating oscillator further comprises a current mirror transistor coupled to the LC oscillator and the set of bipolar junction transistors, and
wherein a collector of the current mirror transistor is coupled to the LC oscillator and a base of the current mirror transistor is coupled to a base of one of the set of bipolar junction transistors, and the current mirror transistor is configured to flow a current proportional to the current flowing through the set of bipolar junction transistors.

5. The digital isolator of claim 4 ,
wherein a current gain value of the current mirror transistor in relation to a current gain of a transistor of the first set of transistors is adjustable.

6. A digital isolator comprising:
a diode emulating oscillator configured to generate a modulated signal;
an isolation barrier configured to transmit the modulated signal via a channel; and
a receiver configured to receive and demodulate the modulated signal,
wherein the diode emulating oscillator comprises a set of bipolar junction transistors coupled in series, and an inductor capacitor (LC) oscillator coupled to the set of bipolar junction transistors in parallel, and
wherein the LC oscillator is configured to generate the modulated signal when a current flows through the set of bipolar junction transistors;
wherein the LC oscillator comprises an inductor capacitor (LC) tank circuit, and a set of transistors coupled to the LC tank circuit,
wherein the LC tank circuit comprises an inductor, and a capacitor coupled to the inductor in parallel, and the set of transistors comprises a first pair of cross coupled NMOS transistors and a second pair of cross coupled PMOS transistors,
wherein a drain of a first transistor of the first pair of cross coupled NMOS transistors is coupled to a first end of the LC tank circuit and a drain of a second transistor of the first pair of cross coupled transistors is coupled to a second end the LC tank circuit,
wherein sources of the first and second transistors of the first pair of cross coupled NMOS transistors are coupled to the collector of the current mirror transistor,
wherein a drain of a first transistor of the second pair of cross coupled PMOS transistors is coupled to the first end of the LC tank circuit and a drain of a second transistor of the second pair of cross coupled PMOS transistors is coupled to the second end the LC tank circuit, and
wherein sources of the first and second transistors of the second pair of cross coupled PMOS transistors are coupled to an end of the set of bipolar junction transistor configured to receive input current or voltage.

Assignees

• Texas Instruments Inc

Inventors

• Singh Tarunvir
• Shrivastava Kumar Anurag
• Paul Somshubhra
• Nasum Sreeram Subramanyam

Classifications

• H04B1/69

  Spread spectrum techniques · CPC title

• H03B5/1231

  the amplifier comprising one or more bipolar transistors · CPC title

• H03B5/1215

  the current source or degeneration circuit being in common to both transistors of the pair, e.g. a cross-coupled long-tailed pair · CPC title

• H03F3/45

  Differential amplifiers (differential sense amplifiers G11C7/062) · CPC title

• H03F3/45475 Primary

  using IC blocks as the active amplifying circuit · CPC title