Constructing and programming quantum hardware for quantum annealing processes

Patent metadata

Field	Value
Publication number	US-10789541-B2
Application number	US-202016853463-A
Country	US
Kind code	B2
Filing date	Apr 20, 2020
Priority date	Jan 6, 2014
Publication date	Sep 29, 2020
Grant date	Sep 29, 2020

Abstract

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for constructing and programming quantum hardware for quantum annealing processes.

First claim

What is claimed is:

1. A method comprising:
configuring a first logical superconducting unit and a second logical superconducting unit that form a first pair of logical superconducting units for use in computation to each have quantum states that can be spanned over Pauli operator σ sj i , where i=x, y, or z;
configuring a first control superconducting unit and a second control superconducting unit that form a first pair of control superconducting units for use in assisting the computation without being a computational unit to each have quantum states that can be spanned over Pauli operator σ ck i , where i=x, y, or z;
coupling the first logical superconducting unit and the second control superconducting unit by applying a magnetic field along the z direction; and
coupling the second logical superconducting unit and the first control superconducting unit by applying a magnetic field along the z direction.

2. The method of claim 1 , wherein:
when applying the magnetic field to the first logical superconducting unit and the second control superconducting unit, a quantum operator σ s1 z of the first logical superconducting unit is coupled with a quantum operator σ c2 z of the second control superconducting unit in a first coupling represented by σ s1 x σ s2 z ; and
when applying the magnetic field to the second logical superconducting unit and the first control superconducting unit, the magnetic field couples a quantum operator σ s2 z of the first control superconducting unit with a quantum operator σ c1 z of the second logical superconducting unit in a second coupling represented by σ s2 x σ c1 z .

3. The method of claim 1 , wherein the first and second logical superconducting units and first and second control superconducting units comprise superconducting qubits having binary quantum states.

4. The method of claim 1 , wherein the logical superconducting units have the same precision as the control superconducting units.

5. The method of claim 1 , wherein the control superconducting units have less precision than the logical superconducting units.

6. The method of claim 1 , wherein the superconducting units and the couplings are configured such that a quantum Hamiltonian characterizing the superconducting units and the couplers is:

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Assignees

• Google Llc

Inventors

• Mohseni Masoud
• Neven Hartmut

Classifications

• G06N7/01

  Probabilistic graphical models, e.g. probabilistic networks · CPC title

• H10N60/128

  having three or more electrodes, e.g. transistor-like structures · CPC title

• H10N60/12

  Josephson-effect devices · CPC title

• G06N10/40 Primary

  Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control · CPC title

• G06N10/70 Primary

  Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation · CPC title