Method of processing solder bump by vacuum annealing

Patent metadata

Field	Value
Publication number	US-10784221-B2
Application number	US-201113312395-A
Country	US
Kind code	B2
Filing date	Dec 6, 2011
Priority date	Dec 6, 2011
Publication date	Sep 22, 2020
Grant date	Sep 22, 2020

Abstract

A method includes vacuum annealing on a substrate having at least one solder bump to reduce voids at an interface of the at least one solder bump. A die is mounted over the substrate.

First claim

What is claimed is:

1. A method, comprising:
performing a vacuum annealing on a substrate having at least one solder bump to reduce voids at an interface of the at least one solder bump, wherein the vacuum annealing is performed as part of a soldering process in which the at least one solder bump is reflowed, thereby electrically connecting an electrical pad of an adjoining surface of the substrate to an adjoining surface of a die, each of the electrical pad and the adjoining surface comprising copper; and
mounting the die over the substrate,
wherein the vacuum annealing and the reflowing are performed at the same time.

2. The method of claim 1 , further comprising performing flux cleaning.

3. The method of claim 2 , wherein the flux cleaning is performed using KOH or ether solvent.

4. The method of claim 1 , wherein the vacuum annealing is performed at a temperature about 20° C. to 30° C. higher than a melting temperature of the at least one solder bump.

5. The method of claim 1 , wherein the at least one solder bump comprises Sn—Ag, Sn—Ag—Cu, or Sn—Cu and the vacuum annealing is performed at a temperature ranging from about 240° C. to 250° C.

6. The method of claim 1 , wherein the at least one solder bump comprises Sn—Zn and the vacuum annealing is performed at a temperature ranging from about 220° C. to 230° C.

7. The method of claim 1 , wherein the at least one solder bump comprises Sn—Bi and the vacuum annealing is performed at a temperature ranging from about 170° C. to 180° C.

8. The method of claim 1 , wherein the at least one solder bump comprises In—Sn and the vacuum annealing is performed at a temperature ranging from about 160° C. to 170° C.

9. The method of claim 1 , wherein the vacuum annealing is performed for 30 seconds or more.

10. The method of claim 1 , wherein the soldering process comprises electrically connecting the die to the substrate through an electrical pad or pillar on the die.

11. The method of claim 1 , wherein the soldering process comprises passing the substrate and the die through a reflow oven.

12. A method, comprising:
performing a vacuum annealing on a substrate having at least one solder bump to reduce voids at an interface of the at least one solder bump, wherein the vacuum annealing is performed:
for about 30 seconds, and
as part of a reflow process comprising soldering the at least one solder bump to an adjoining surface of the substrate and to an adjoining surface of a die, thereby electrically connecting the substrate to the die, wherein each of the adjoining surfaces comprises copper;

mounting the die over the substrate; and
performing flux cleaning,
wherein the vacuum annealing and the reflow process are performed at the same time.

13. The method of claim 12 , wherein the vacuum annealing is performed at a temperature about 20° C. to 30° C. higher than a melting temperature of the at least one solder bump.

14. The method of claim 12 , wherein the soldering the at least one solder bump to the adjoining surface of the substrate comprises electrically connecting the die to the substrate through an electrical pad on a surface of the substrate.

15. The method of claim 12 , wherein the reflow process comprises passing the die and the substrate through a reflow oven.

16. The method of claim 12 , wherein the electrically connecting the substrate to the die comprises electrically connecting the substrate to a through substrate via (TSV) of the die.

17. A method, comprising:
mounting a die over a substrate having at least one solder bump;
performing a vacuum reflowing process to the at least one solder bump of the substrate, the vacuum reflowing process comprising:
applying a temperature about 20° C. to 30° C. higher than a melting temperature of the at least one solder bump;
applying a vacuum pressure of 10 −2 torr-10 −6 torr to reduce voids at an interface of the at least one solder bump;
performing a simultaneous soldering operation that electrically connects the at least one solder bump to an adjoining surface of the substrate and to an adjoining surface of the die, wherein each of the adjoining surfaces comprises copper; and
performing the vacuum reflowing process for about 30 seconds; and

performing flux cleaning.

18. The method of claim 17 , wherein the flux cleaning is performed using KOH or ether solvent.

19. The method of claim 17 , wherein the performing the simultaneous soldering operation comprises electrically connecting the at least one solder bump to a trace on the substrate.

20. The method of claim 17 , wherein the performing the simultaneous soldering operation comprises electrically connecting the at least one solder bump to a through substrate via (TSV) of the die.

Assignees

• Lin Hsiu Jen
• Liu Chung Shi
• Cheng Ming Da
• Lin Chung Cheng
• Tsai Yu Peng
• Chen Cheng Ting
• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Lin Hsiu-Jen
• Liu Chung-Shi
• Cheng Ming-Da
• Lin Chung-Cheng
• Tsai Yu-Peng
• Chen Cheng-Ting

Classifications

• H10W72/29

  Bond pads specially adapted therefor · CPC title

• H10W72/942

  relative to underlying supporting features, e.g. bond pads, RDLs or vias · CPC title

• H10W72/922

  Bond pads being integral with underlying chip-level interconnections · CPC title

• H10W72/07236

  Soldering or alloying · CPC title

• H10W72/01271

  Cleaning, e.g. oxide removal or de-smearing · CPC title