Method and semiconductor circuit for protecting an operating system of a security system of a vehicle

Patent metadata

Field	Value
Publication number	US-10783242-B2
Application number	US-201816609104-A
Country	US
Kind code	B2
Filing date	Oct 17, 2018
Priority date	Oct 26, 2017
Publication date	Sep 22, 2020
Grant date	Sep 22, 2020

Abstract

The disclosure relates to a method for protecting an operating system of a security system, which is stored in a working memory of a control device of a vehicle, against irregular modification.

First claim

The invention claimed is:

1. A method for protecting an operating system of a security system in a vehicle against irregular modification, comprising:
storing the operating system of the security system in a working memory of a control device of the vehicle;
storing, in a first working memory area of the working memory, at least a portion of the operating system of the security system;
mirroring, by a shadow memory manager, the first working memory area from the working memory into a shadow memory; and
monitoring a shadow memory area within the shadow memory, the shadow memory area corresponding to the mirrored first working memory area.

2. The method according to claim 1 , wherein the mirroring includes:
mirroring, automatically and in parallel, the first working memory area from the working memory into the shadow memory by the shadow memory manager.

3. The method according to claim 1 , further comprising:
storing, in a second working memory area of the working memory, at least a portion of an operating system of a comfort system; and
mirroring, by the shadow memory manager, the second working memory area from the working memory into the shadow memory.

4. The method according to claim 3 , further comprising:
configuring the shadow memory manager with a configuration list; and
defining, by the shadow memory manager, the first and second working memory areas to be mirrored into the shadow memory.

5. The method according to claim 3 , further comprising:
configuring the shadow memory manager such that a summed memory capacity of the first and second working memory areas to be mirrored is smaller than a total memory capacity of the working memory.

6. The method according to claim 3 , further comprising:
monitoring, by a hypervisor, an accessing of the second working memory area.

7. The method according to claim 1 , further comprising:
monitoring, by a security inspector, an accessing of the shadow memory area, wherein the shadow memory area corresponds to the mirrored first working memory area that stores the at least a portion of the operating system of the security system.

8. The method according to claim 1 , further comprising:
configuring the shadow memory manager during a start-up of the control device.

9. The method according to claim 1 , further comprising:
protecting the shadow memory manager during an operation of the control device.

10. The method according to claim 1 , further comprising:
assigning, exclusively, a dedicated processor to the operating system of the security system stored in the working memory; and
executing, by the dedicated processor, the operating system of the security system.

11. A semiconductor circuit for protecting a security system in a vehicle from an irregular modification, comprising:
a working memory configured to store an operating system of the security system and an operating system of a comfort system, the working memory further configured to store at least a portion of the operating system of the security system in a working memory area within the working memory;
a processor configured to execute the operating system of the security system and the operating system of the comfort system;
a shadow memory comprising a shadow memory area within the shadow memory;
a shadow memory manager configured to mirror the working memory area into the shadow memory; and
a security inspector configured to monitor an accessing of the shadow memory area, wherein the shadow memory area corresponds to the mirrored working memory area,
wherein the working memory, the processor, the shadow memory, the shadow memory manager, and the security inspector are within an integrated topology within the semiconductor circuit.

12. The semiconductor circuit according to claim 11 , further comprising:
a configuration list of the shadow memory manager.

13. The semiconductor circuit according to claim 11 , wherein the shadow memory comprises a memory capacity smaller than a memory capacity of the working memory.

14. The semiconductor circuit according to claim 11 , wherein the shadow memory is external to the semiconductor circuit, and is controllable by the semiconductor circuit.

15. The semiconductor circuit according to claim 14 , wherein the shadow memory is a double data rate (DDR) memory module.

16. The semiconductor circuit according to claim 14 , wherein the shadow memory comprises a storage capacity smaller than a storage capacity of the working memory.

Assignees

• Audi Ag

Inventors

• Klein Markus
• Zawadzki Kamil
• Ahn Changsup
• Gruber Hans-Georg

Classifications

• G06F2221/033

  Test or assess software · CPC title

• G06F21/53 Primary

  by executing in a restricted environment, e.g. sandbox or secure virtual machine · CPC title

• H04L2012/40273

  the transportation system being a vehicle · CPC title

• G06F21/6281

  at program execution time, where the protection is within the operating system · CPC title

• H04L12/40 Primary

  Bus networks · CPC title