Integrated circuit voltage-controlled oscillator with late-stage fabrication tuning

Patent metadata

Field	Value
Publication number	US-10778146-B2
Application number	US-201816011793-A
Country	US
Kind code	B2
Filing date	Jun 19, 2018
Priority date	Jun 19, 2018
Publication date	Sep 15, 2020
Grant date	Sep 15, 2020

Abstract

A voltage-controlled oscillator (VCO) having an operating frequency dependent on a total capacitance of selectable tuning capacitors can be fabricated within an integrated circuit (IC). The VCO can include active electronic devices fabricated within a set of lower layers of the IC and selectable tuning capacitors having electrically conductive structures separated by dielectric material fabricated within a set of upper layers of the IC. The upper layers of the IC are located above the set of lower layers of the IC. The VCO can also include a set of interconnect structures configurable to select a total capacitance of the selectable tuning capacitors by electrically interconnecting the first portion of the VCO to capacitors of the at least one selectable tuning capacitor.

First claim

What is claimed is:

1. A voltage-controlled oscillator (VCO) fabricated within an integrated circuit (IC), the VCO having an operating frequency at least partially dependent on a total capacitance of at least one selectable tuning capacitor, wherein the total capacitance of the at least one selectable tuning capacitor is within a range between 8% and 12% of a sum of a capacitance of band capacitors of the VCO, the VCO comprising:
a first portion that includes active electronic devices fabricated within a set of lower layers of the IC;
a second portion, fabricated within a set of upper layers of the IC located above the set of lower layers of the IC, the second portion including the at least one selectable tuning capacitor having electrically conductive structures separated by dielectric material; and
a set of interconnect structures that is configurable to select a total capacitance of the at least one selectable tuning capacitor by electrically interconnecting the first portion of the VCO to capacitors of the at least one selectable tuning capacitor.

2. The VCO of claim 1 , wherein the electrically conductive structures fabricated on at least one layer of the set of upper layers of the IC are selected from the group consisting of: parallel plates, interdigitated metal finger structures, and orthogonally oriented comb structures fabricated on at least two layers of the set of upper layers.

3. The VCO of claim 1 , wherein the set of upper layers of the IC include IC wiring.

4. The VCO of claim 1 , wherein at least one interconnect structure of the set of interconnect structures is configured to electrically interconnect the first portion of the VCO to a selectable tuning capacitor of the at least one selectable tuning capacitor.

5. The VCO of claim 1 , wherein at least one interconnect structure of the set of interconnect structures is configured to electrically isolate the first portion of the VCO from the at least one selectable tuning capacitor.

6. The VCO of claim 1 , wherein the set of interconnect structures includes vias configured to electrically interconnect the first portion of the VCO to the at least one selectable tuning capacitor.

7. The VCO of claim 1 , wherein at least two capacitors of the at least one selectable tuning capacitor have equivalent capacitance values.

8. The VCO of claim 1 , wherein the at least one selectable tuning capacitor includes capacitors having a plurality of unique capacitance values.

9. An integrated circuit (IC), the IC comprising:
a set of lower layers;
a set of upper layers located above the set of lower layers; and
a tunable circuit having an operating frequency at least partially dependent on a total capacitance of at least one selectable tuning capacitor, wherein the total capacitance of the at least one selectable tuning capacitor is within a range between 8% and 12% of a sum of a capacitance of band capacitors of the tunable circuit, the tunable circuit including:
a first portion that includes active electronic devices fabricated within the set of lower layers;
a second portion, fabricated within the set of upper layers, that includes the at least one selectable tuning capacitor having electrically conductive structures separated by dielectric material; and
a set of interconnect structures that is configurable to select a total capacitance of the at least one selectable tuning capacitor by electrically interconnecting the first portion of the tunable circuit to capacitors of the at least one selectable tuning capacitor.

10. The IC of claim 9 , wherein capacitors of the at least one selectable tuning capacitor have a plurality of predetermined binary-weighted capacitance values.

11. The IC of claim 9 , wherein the tunable circuit includes a circuit selected from the group consisting of: an inductive-capacitive (LC) tank circuit, and a voltage-controlled oscillator (VCO) circuit.

12. The IC of claim 9 , wherein the at least one selectable tuning capacitor includes a Metal-Insulator-Metal (MIM) capacitor.

13. The IC of claim 9 , wherein the total capacitance of the at least one selectable tuning capacitor is in a range between 4 pF and 6 pF.

14. A method, performed by a set of electronic design automation (EDA) tools executed by at least one processor circuit, of modifying an operating frequency of a voltage-controlled oscillator (VCO) circuit within an integrated circuit (IC), the VCO including a first portion containing active electronic devices fabricated within a set of lower layers of the IC, the VCO further including a second portion containing at least one selectable tuning capacitor fabricated within a set of upper layers of the IC, the operating frequency at least partially dependent on a total capacitance of the at least one selectable tuning capacitor, the method comprising:
extracting, with the set of EDA tools, an initial VCO netlist from an initial VCO layout, the initial VCO layout stored in an IC design file and including the at least one selectable tuning capacitor;
simulating, with the set of EDA tools, the initial VCO netlist to produce initial simulation results, the initial simulation results being stored in the design file;
comparing, with the set of EDA tools, the initial simulation results to a set of performance requirements to produce an initial performance difference;
adjusting, with the set of EDA tools, according to the initial performance difference being outside of a specified range, an amount of selectable tuning capacitance by changing, in the IC design file, data representing a set of interconnect structures configured to electrically connect the first portion of the VCO to the second portion of the VCO, the changing producing, within the IC design file, a modified VCO layout having a modified total capacitance of the at least one selectable tuning capacitor;
extracting, with the set of EDA tools, a modified VCO netlist from the modified VCO layout;
simulating, with the set of EDA tools, the modified VCO netlist to produce updated simulation results; and
comparing, with the set of EDA tools, the updated simulation results to the set of performance requirements to produce an updated performance difference.

15. The method of claim 14 , further comprising fabricating, in response to the updated performance difference being within the specified range, in accordance with the data contained within the IC design file, the IC at a semiconductor manufacturing facility, the IC including, within the set of lower layers of the IC, the first portion of the VCO and within the set of upper layers of the IC, the second portion of the VCO, the fabricating including the use of at least one masking process operation and at least one deposition process operation.

16. The method of claim 14 , wherein the adjusting the amount of selectable tuning capacitance includes performing an operation selected from the group consisting of: increasing a total capacitance of the at least one selectable tuning capacitor, and decreasing the total capacitance of the at least one selectable tuning capacitor.

17. The method of claim 14 , wherein the comparing to produce an initial performance difference includes comparing a set of hardware performance measurements to the set of performance requirements.

18. The method of claim 14 , wherein the set of performance requirements includes a specified oscillation frequency range of the VCO circuit.

19. The method of claim 14 , wherein the set of performance requirements includes an oscillation frequency of the VCO circuit that is greater than 50 GH

Assignees

• IBM

Inventors

• Kesselring Grant P
• Strom James
• Trcka Scott
• Wu Ann Chen

Classifications

• H03B5/1212 Primary

  the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair · CPC title

• H03L7/099

  concerning mainly the controlled oscillator of the loop · CPC title

• H03B5/1296

  the feedback circuit comprising a transformer · CPC title

• H03B5/1228

  the amplifier comprising one or more field effect transistors · CPC title

• H03B5/1281

  the parameter being the amount of feedback · CPC title