Methods and apparatus to generate an aircraft system model using a standardized architecture

Patent metadata

Field	Value
Publication number	US-10776530-B2
Application number	US-201715788396-A
Country	US
Kind code	B2
Filing date	Oct 19, 2017
Priority date	Oct 19, 2017
Publication date	Sep 15, 2020
Grant date	Sep 15, 2020

Abstract

Methods, apparatus, systems, and articles of manufacture are disclosed to generate an aircraft system model using a standardized architecture. An example apparatus includes a model generator to generate an aircraft system model of an aircraft system based on a standardized architecture, a model integrator to integrate the aircraft system model into an integrated aircraft system model, a power sequencer to perform a power sequence test on the integrated aircraft system model, and a report generator to generate a report including a result of the power sequence test.

First claim

What is claimed is:

1. An apparatus comprising:
a model generator to:
generate an aircraft system model of an aircraft system based on a standardized architecture;
generate at least one of a power supply model, a controller model, or a controller function model of the aircraft system model; and
populate an attribute of at least one of the power supply model, the controller model, or the controller function model based on a database;

a model integrator to integrate the aircraft system model into an integrated aircraft system model;
a power sequencer to perform a power sequence test on the integrated aircraft system model by executing the controller function model, the controller function model to execute one or more functions including at least one of an input data acquisition function, an input processing function, a system component function, an output processing function, or an output data acquisition function, the power sequencer to execute the controller function model to:
execute the input data acquisition function by obtaining a data packet and processing the data packet by extracting an input signal from the data packet;
execute the input processing function by validating an input signal and in response to validating the input signal, scaling the input signal;
execute the system component function by calculating a parameter value based on a scaled input signal and in response to calculating the parameter value, generating an output signal based on the calculated parameter value;
execute the output processing function by validating an output signal and in response to validating the output signal, scaling the output signal; and

execute the output data acquisition function by generating a data packet including an output signal and transmitting the data packet; and
a report generator to generate a report including a result of the power sequence test, at least one of the model generator, the model integrator, the power sequencer, or the report generator implemented with hardware.

2. The apparatus of claim 1 , further including a model configurator to configure the aircraft system model by:
assigning the power supply model to the aircraft system model based on determining that the aircraft system includes the power supply model;
assigning the controller model to the aircraft system model based on determining that the aircraft system includes the controller model;
assigning the controller function model to the aircraft system model based on determining that the controller model includes the controller function model; and
generating the aircraft system model based on the assignments.

3. The apparatus of claim 1 , wherein the power supply model includes at least one of a voltage threshold check parameter, a delay on parameter, or a delay off parameter.

4. The apparatus of claim 3 , wherein at least one of:
the voltage threshold check parameter is a low-power threshold parameter, a high-power threshold parameter, or a power type parameter;
the delay on parameter is a delay on time parameter, a tolerance for a delay on time parameter, or a delay on time design validation parameter; or
the delay off parameter is a delay off time parameter, a tolerance for a delay off time parameter, or a delay off time design validation parameter.

5. The apparatus of claim 1 , wherein the controller model includes one or more function states including at least one of an initialization state, a fail-safe state, or an operation state, the operation state including at least one of a limited operation state or a normal operation state.

6. The apparatus of claim 5 , wherein the initialization state and the fail-safe state include a sub-set of functions associated with the operation state, wherein the fail-safe state is triggered based on a non-responsive power event of a component in the aircraft system when the aircraft system is in at least one of the initialization state or the operation state.

7. The apparatus of claim 1 , wherein the power sequencer is to perform the power sequence test on the integrated aircraft system model by:
determining a power sequence based on a first standardized format;
determining flagging criteria for the power sequence based on a second standardized format;
executing the power sequence;
generating a timeline of the executed power sequence; and
in response to the timeline including a flagged event:
generating a visual indicator of the flagged event; and
assigning a corresponding timestamp to the visual indicator.

8. A computer implemented method comprising:
generating an aircraft system model of an aircraft system based on a standardized architecture;
generating at least one of a power supply model, a controller model, or a controller function model of the aircraft system model;
populating an attribute of at least one of the power supply model, the controller model, or the controller function model based on a database;
integrating the aircraft system model into an integrated aircraft system model;
performing a power sequence test on the integrated aircraft system model by executing the controller function model, the controller function model to execute one or more functions including at least one of an input data acquisition function, an input processing function, a system component function, an output processing function, or an output data acquisition function, executing the controller function model including:
executing the input data acquisition function by obtaining a data packet and processing the data packet by extracting an input signal from the data packet;
executing the input processing function by validating an input signal and in response to validating the input signal, scaling the input signal;
executing the system component function by calculating a parameter value based on a scaled input signal and in response to calculating the parameter value, generating an output signal based on the calculated parameter value;
executing the output processing function by validating an output signal and in response to validating the output signal, scaling the output signal; and
executing the output data acquisition function by generating a data packet including an output signal and transmitting the data packet; and
generating a report including a result of the power sequence test.

9. The method of claim 8 , further including configuring the aircraft system model by:
assigning the power supply model to the aircraft system model based on determining that the aircraft system includes the power supply model;
assigning the controller model to the aircraft system model based on determining that the aircraft system includes the controller model;
assigning the controller function model to the aircraft system model based on determining that the controller model includes the controller function model; and
generating the aircraft system model based on the assignments.

10. The method of claim 8 , wherein the power supply model includes at least one of a voltage threshold check parameter, a delay on parameter, or a delay off parameter.

11. The method of claim 10 , wherein at least one of:
the voltage threshold check parameter is a low-power threshold parameter, a high-power threshold parameter, or a power type parameter;
the delay on parameter is a delay on time parameter, a tolerance for a delay on time parameter, or a delay on time design validation parameter; or
the delay off parameter is a delay off time parameter, a tolerance for a delay off time parameter, or a delay off time design validation parameter.

12. The method of claim 8 , wherein the controller model includes one or more function states including at least

Assignees

• Boeing Co

Inventors

• Uyeda Christopher M
• Walstrom Steven M
• Jackson Timothy E
• Andelin Gary L
• Hansen William P

Classifications

• G06F30/15 Primary

  Vehicle, aircraft or watercraft design · CPC title

• B64F5/00

  Designing, manufacturing, assembling, cleaning, maintaining or repairing aircraft, not otherwise provided for; Handling, transporting, testing or inspecting aircraft components, not otherwise provided for · CPC title

• G06F2113/28

  Fuselage, exterior or interior · CPC title

• G06F30/20

  Design optimisation, verification or simulation (optimisation, verification or simulation of circuit designs G06F30/30) · CPC title