Methods, devices and systems for data conversion

Patent metadata

Field	Value
Publication number	US-10771087-B2
Application number	US-201916424984-A
Country	US
Kind code	B2
Filing date	May 29, 2019
Priority date	Jun 13, 2018
Publication date	Sep 8, 2020
Grant date	Sep 8, 2020

Abstract

In accordance with an embodiment, a method of monitoring a data converter includes determining a multiplicity of time-associated linearity parameters that describe a linearity of the data converter at a multiplicity of different times, and determining a state of the data converter based on comparing at least one linearity parameter of the multiplicity of time-associated linearity parameters with a comparison parameter.

First claim

What is claimed is:

1. A method for monitoring a data converter, the method comprising:
determining a multiplicity of time-associated linearity parameters that describe a linearity of the data converter at a multiplicity of different times, and
determining a state of the data converter based on comparing at least one linearity parameter of the multiplicity of time-associated linearity parameters with a comparison parameter.

2. The method as claimed in claim 1 , wherein the comparison parameter comprises a threshold value.

3. The method as claimed in claim 1 , wherein the comparison parameter comprises at least one further time-associated linearity parameter of the multiplicity of time-associated linearity parameters.

4. The method as claimed in claim 1 , wherein the at least one linearity parameter comprises at least one of:
an integral non-linearity (INL);
a differential non-linearity (DNL);
an offset error;
a missing bit position; or
a gain error.

5. The method as claimed in claim 1 , wherein determining the multiplicity of time-associated linearity parameters comprises converting a predefined test signal using the data converter and detecting the converted predefined test signal.

6. The method as claimed in claim 5 , wherein the predefined test signal comprises only a portion of an input range of the data converter, wherein the portion of the input range comprises a range of a design-specific maximum non-linearity.

7. The method as claimed in claim 6 , wherein the data converter comprises an analog-to-digital converter having at least two analog-to-digital converter states, and the portion of the input range comprised by the predefined test signal comprises a transition range between the at least two analog-to-digital converter states.

8. The method as claimed in claim 6 , wherein:
the data converter is a pipeline analog-to-digital converter comprising a multiplicity of converter stages, wherein each converter stage of the converter stages has a respective conversion range that is, in each case, at least partly different from one another; and
the portion of the input range comprised by the predefined test signal includes the respective conversion ranges of at least two of the converter stages.

9. The method as claimed in claim 6 , wherein
the data converter is a successive approximation analog-to-digital converter, and wherein the range of the design-specific maximum non-linearity comprises a value range involving switching of a most significant bit, MSB, or a second most significant bit, MSB-1.

10. The method as claimed in claim 1 , wherein the at least one linearity parameter or the comparison parameter is defined as a function of at least one ambient parameter.

11. The method as claimed in claim 1 , further comprising:
determining an operating point of the data converter; and
determining a correctness of an operating point state of the data converter based on a comparison of the operating point with at least one third value, wherein determining the multiplicity of time-associated linearity parameters and determining the state of the data converter are only carried out if the correctness is present.

12. A device for data conversion, comprising:
a data converter;
a test signal circuit configured to determine a multiplicity of time-associated linearity parameters that describe a linearity of the data converter, at a multiplicity of different times; and
a monitoring circuit configured to determine a state of the data converter based on comparing at least one linearity parameter of the multiplicity of time-associated linearity parameters with a comparison parameter.

13. The device for data conversion as claimed in claim 12 , further comprising:
a signal interface configured to provide at least one signal based on the state of the data converter; and
a shutdown circuit configured to shut down the data converter based on the state of the data converter.

14. The device for data conversion as claimed in claim 12 , wherein:
the monitoring circuit is configured to determine an operating point of the data converter, and determine whether the operating point of the data converter is correct based on a comparison of the operating point with at least one third value; and
the determining the multiplicity of time-associated linearity parameters and the determining the state of the data converter are only performed if the operating point is determined to be correct.

15. The device for data conversion as claimed in claim 12 , wherein:
the test signal circuit is configured to provide a predefined test signal;
the predefined test signal comprises only a portion of an input range of the data converter, wherein the portion of the input range comprises a range of a design-specific maximum non-linearity; and
the data converter is configured to convert the predefined test signal to a converted test signal.

16. The device for data conversion as claimed in claim 15 , wherein the data converter is a pipeline analog-to-digital converter comprising a multiplicity of converter stages, wherein each converter stage of the converter stages has a respective conversion range that is, in each case, at least partly different from one another; and
the portion of the input range comprised by the predefined test signal includes the respective conversion ranges of at least two of the converter stages.

17. The device for data conversion as claimed in claim 15 , wherein the data converter is a successive approximation analog-to-digital converter, and wherein the range of design-specific maximum non-linearity comprises a value range involving switching of a most significant bit, MSB, or a second most significant bit, MSB-1.

18. A method, comprising:
generating a predefined test signal;
converting the predefined test signal using an analog-to-digital converter to generate a converted test signal;
determining a multiplicity of time-associated linearity parameters that describe a linearity of the analog-to-digital converter at a multiplicity of different times based on the converted test signal; and
comparing at least one linearity parameter of the multiplicity of time-associated linearity parameters with a comparison parameter; and
determining a state of the analog-to-digital converter based on the comparing.

19. The method of claim 18 , wherein the predefined test signal comprises only a portion of an input range of the analog-to-digital converter, and the portion of the input range comprises a range of a design-specific maximum non-linearity.

20. The method of claim 18 , further comprising shutting down the analog-to-digital converter based on the determined state.

Assignees

• Infineon Technologies Ag

Inventors

• Schrattenecker Jochen O
• Bogner Peter
• Cristofoli Andrea
• Kropfitsch Michael

Classifications

• H03M1/12

  Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

• H03M1/464

  Non-linear conversion · CPC title

• H03M1/84 Primary

  Non-linear conversion · CPC title

• H03M1/66

  Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

• H03M1/1071 Primary

  Measuring or testing · CPC title