Amplifier with scalable impedance adjustments over gain modes

US10771029B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10771029-B2
Application numberUS-201916405951-A
CountryUS
Kind codeB2
Filing dateMay 7, 2019
Priority dateAug 31, 2016
Publication dateSep 8, 2020
Grant dateSep 8, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Disclosed herein are signal amplifiers that provide impedance adjustments for different gain modes. The impedance adjustments are configured to result in a constant real impedance for an input signal at the amplifier. The amplifiers include a scalable impedance adjustment circuit that adjusts inductance and/or a device width to compensate for changes in the total impedance presented to an input signal. By providing impedance adjustments, the amplifiers reduce losses and improve performance by improving impedance matching over a range of gain modes.

First claim

Opening claim text (preview).

What is claimed is: 1. A radio-frequency (RF) signal amplifier configured to provide a plurality of gain modes, the signal amplifier comprising: a power supply configured to provide a source current that differs for individual gain modes; a gain stage including an RF stage transistor and a cascode stage transistor, the gain stage configured to receive the source current from the power supply to operate the gain stage at corresponding gain modes, a total input impedance presented to an input RF signal associated with a transconductance of the RF stage transistor; and an impedance adjustment circuit coupled to the gain stage and configured to provide a tailored adjustment that compensates for changes in the transconductance using switchable inductive elements. 2. The amplifier of claim 1 wherein the gain stage includes a plurality of switchable amplification branches each include a switching transistor and an RF stage transistor. 3. The amplifier of claim 2 wherein in a first gain mode, a first plurality of the RF stage transistors is activated and in a second gain mode, lower than the first gain mode, a second plurality of the RF stage transistors is activated, the number of activated RF stage transistors being less in the second gain mode than the first gain mode. 4. The amplifier of claim 1 wherein the amplifier is a low-noise amplifier (LNA). 5. The amplifier of claim 1 wherein the switchable inductive elements include a plurality of switches that selectively couple corresponding inductive elements to a reference potential node. 6. The amplifier of claim 1 wherein the tailored adjustment is configured so that the total impedance presented to the input RF signal is 50Ω for individual gain modes. 7. The amplifier of claim 1 wherein the gain stage is scalable and includes a plurality of transistors in an electrically parallel configuration, each transistor associated with an individual switchable amplification branch that selectively activates the associated transistor. 8. The amplifier of claim 7 wherein the impedance adjustment circuit is further configured to effectively scale a device width at a rate that matches a scaling of the source current for individual gain modes. 9. The amplifier of claim 1 wherein the tailored impedance adjustment is further configured to result in a fixed real impedance for the total input impedance. 10. The amplifier of claim 1 wherein the plurality of gain modes includes a low gain mode, a high gain mode, and one or more intermediate gain modes. 11. A semiconductor die having a radio-frequency (RF) circuit, comprising: a substrate; and an RF amplifier configured to provide a plurality of gain modes implemented on the substrate, the RF amplifier including a power supply configured to provide a source current that differs for individual gain modes; the RF amplifier further including a gain stage including an RF stage transistor and a cascode stage transistor, the gain stage configured to receive the source current from the power supply to operate the gain stage at corresponding gain modes, a total input impedance presented to an input RF signal associated with a transconductance of the RF stage transistor; and the RF amplifier further including an impedance adjustment circuit coupled to the gain stage and configured to provide a tailored adjustment that compensates for changes in the transconductance using switchable inductive elements. 12. The semiconductor die of claim 11 wherein the RF amplifier is a low-noise amplifier (LNA). 13. The semiconductor die of claim 11 wherein the gain stage includes a plurality of switchable amplification branches each include a switching transistor and an RF stage transistor. 14. The semiconductor die of claim 13 wherein in a first gain mode, a first plurality of the RF stage transistors is activated and in a second gain mode, lower than the first gain mode, a second plurality of the RF stage transistors is activated, the number of activated RF stage transistors being less in the second gain mode than the first gain mode. 15. The semiconductor die of claim 11 wherein the tailored adjustment is configured so that the total impedance presented to the input RF signal is 50Ω for individual gain modes. 16. The semiconductor die of claim 11 wherein the tailored impedance adjustment is further configured to result in a fixed real impedance for the total input impedance. 17. A wireless device comprising: an antenna configured to at least receive a radio-frequency (RF) signal; an RF amplifier in communication with the antenna and configured to provide a plurality of gain modes to generate an amplified RF signal, the RF amplifier including a power supply configured to provide a source current that differs for individual gain modes; the RF amplifier further including a gain stage including an RF stage transistor and a cascode stage transistor, the gain stage configured to receive the source current from the power supply to operate the gain stage at corresponding gain modes, a total input impedance presented to an input RF signal associated with a transconductance of the RF stage transistor; and the RF amplifier further including an impedance adjustment circuit coupled to the gain stage and configured to provide a tailored adjustment that compensates for changes in the transconductance using switchable inductive elements; and a transceiver configured to process the amplified RF signal. 18. The wireless device of claim 17 wherein the wireless device is a cellular phone configured to utilize the plurality of gain modes in receive operations. 19. The wireless device of claim 17 wherein the tailored adjustment is configured so that the total impedance presented to the input RF signal is 50Ω for individual gain modes. 20. The wireless device of claim 17 wherein the tailored impedance adjustment is further configured to result in a fixed real impedance for the total input impedance.

Assignees

Inventors

Classifications

  • H03F1/0227Primary

    using supply converters · CPC title

  • using at least one transistor as controlling device, the transistor being used as a variable impedance device · CPC title

  • H03G3/3042Primary

    in modulators, frequency-changers, transmitters or power amplifiers · CPC title

  • Digital control of analog signals · CPC title

  • using discontinuously variable devices, e.g. switch-operated · CPC title

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What does patent US10771029B2 cover?
Disclosed herein are signal amplifiers that provide impedance adjustments for different gain modes. The impedance adjustments are configured to result in a constant real impedance for an input signal at the amplifier. The amplifiers include a scalable impedance adjustment circuit that adjusts inductance and/or a device width to compensate for changes in the total impedance presented to an input…
Who is the assignee on this patent?
Skyworks Solutions Inc
What technology area does this patent fall under?
Primary CPC classification H03F1/0227. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 08 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).