Multilayer electronic component and method of manufacturing the same

US10770232B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10770232-B2
Application numberUS-201816044898-A
CountryUS
Kind codeB2
Filing dateJul 25, 2018
Priority dateSep 29, 2017
Publication dateSep 8, 2020
Grant dateSep 8, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multilayer electronic component for enhancing damp proof reliability includes: a capacitor body including a plurality of dielectric layers, and first and second internal electrodes, alternately disposed across the dielectric layers to expose one end of the first and second electrodes through third and fourth surfaces of the capacitor body; first and second conductive layers disposed on the third and fourth surfaces of the capacitor body and connected to the first and second internal electrodes, respectively; first and second plating layers covering surfaces of the first and second conductive layers; and a plurality of coating layers configured in a multilayer structure on a surface of the capacitor body to expose the first and second plating layers and having an entire thickness of 10 nm to 200 nm.

First claim

Opening claim text (preview).

What is claimed is: 1. A multilayer electronic component comprising: a capacitor body including first and second surfaces facing each other, third and fourth surfaces connected to the first and second surfaces and facing each other, and fifth and sixth surfaces connected to the first and second surfaces, connected to the third and fourth surfaces, and facing each other, and including a plurality of dielectric layers, and first and second internal electrodes, alternately disposed across the dielectric layers to expose one end of the first and second internal electrodes through the third and fourth surfaces; a first conductive layer and a second conductive layer disposed on the third and fourth surfaces of the capacitor body and connected to the first and second internal electrodes, respectively; a first plating layer and a second plating layer covering surfaces of the first and second conductive layers; and a plurality of coating layers configured in a multilayer structure on a surface of the capacitor body to expose the first and second plating layers and having an entire thickness of 10 nm to 200 nm, wherein the plurality of coating layers is arranged and configured such that at least a portion of the surface of the capacitor body is exposed to an outside of the capacitor body through at least one gap between adjacent portions of the plurality of coating layers. 2. The multilayer electronic component of claim 1 , wherein at least some of the plurality of coating layers are formed of different materials. 3. The multilayer electronic component of claim 2 , wherein the plurality of coating layers are configured with a double-layered structure, and an internal coating layer of the plurality of coating layers includes aluminum oxide (Al 2 O 3 ) and an external coating layer of the plurality of coating layers includes any one of silicon dioxide (SiO 2 ) or titanium dioxide (TiO 2 ). 4. The multilayer electronic component of claim 1 , wherein the plurality of coating layers are further disposed on a portion between the first conductive layer and the first plating layer and a portion between the second conductive layer and the second plating layer. 5. The multilayer electronic component of claim 1 , wherein the first and second plating layers include a nickel (Ni) plating layer disposed on the first and second conductive layers, and a tin (Sn) plating layer disposed on the nickel (Ni) plating layer. 6. A multilayer electronic component comprising: a capacitor body including first and second surfaces facing each other, third and fourth surfaces connected to the first and second surfaces and facing each other, and fifth and sixth surfaces connected to the first and second surfaces, connected to the third and fourth surfaces, and facing each other, and including a plurality of dielectric layers, and first and second internal electrodes, alternately disposed across the dielectric layers to expose one end of the first and second internal electrodes through the third and fourth surfaces; a first conductive layer and a second conductive layer disposed on the third and fourth surfaces of the capacitor body and connected to the first and second internal electrodes, respectively; a first plating layer and a second plating layer covering surfaces of the first and second conductive layers; and a plurality of coating layers configured in a multilayer structure on a surface of the capacitor body to expose the first and second plating layers, wherein at least some of the plurality of coating layers are formed of different materials, and wherein the plurality of coating layers is arranged and configured such that at least a portion of the surface of the capacitor body is exposed to an outside of the capacitor body through at least one gap between adjacent portions of the plurality of coating layers. 7. The multilayer electronic component of claim 6 , wherein the plurality of coating layers have an entire thickness of 10 nm to 200 nm. 8. The multilayer electronic component of claim 6 , wherein the plurality of coating layers are configured with a double-layered structure, and an internal coating layer of the plurality of coating layers includes aluminum oxide (Al 2 O 3 ) and an external coating layer of the plurality of coating layers includes any one of silicon dioxide (SiO 2 ) or titanium dioxide (TiO 2 ). 9. The multilayer electronic component of claim 6 , wherein the plurality of coating layers are further disposed on a portion between the first conductive layer and the first plating layer and a portion between the second conductive layer and the second plating layer. 10. The multilayer electronic component of claim 6 , wherein the first and second plating layers include a nickel (Ni) plating layer disposed on the first and second conductive layers, and a tin (Sn) plating layer disposed on the nickel (Ni) plating layer.

Assignees

Inventors

Classifications

  • characterised by the material of the terminals · CPC title

  • Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

  • electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

  • Housing; Encapsulation · CPC title

  • characterised by the ceramic dielectric material (H01G4/1272, H01G4/1281 take precedence) · CPC title

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What does patent US10770232B2 cover?
A multilayer electronic component for enhancing damp proof reliability includes: a capacitor body including a plurality of dielectric layers, and first and second internal electrodes, alternately disposed across the dielectric layers to expose one end of the first and second electrodes through third and fourth surfaces of the capacitor body; first and second conductive layers disposed on the th…
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H01G4/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 08 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).