Display panel, driving method, and display device

US10769992B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10769992-B2
Application numberUS-201715591906-A
CountryUS
Kind codeB2
Filing dateMay 10, 2017
Priority dateJan 5, 2017
Publication dateSep 8, 2020
Grant dateSep 8, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present application discloses a display panel and a display device. The display panel comprises a plurality of data signal lines; a plurality of scan signal lines intersecting with the plurality of data signal lines, to define a plurality of sub-pixels in an array, and each of the sub-pixels comprising a pixel driving circuit, and an external compensation circuit, comprising a power supply unit, a sampling unit and a data signal generation unit, being connected to the data signal lines, and transmitting a compensated data signal via the data signal lines to the pixel driving circuits. In the present implementation, voltage compensation is performed by the external compensation circuit on the driving transistor and the organic light emitting diode in the pixel driving circuit, to improve the driving capability of the pixel driving circuit and increases the display precision of the display panel.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel, comprising: a plurality of data signal lines; a plurality of scan signal lines disposed to intersect the plurality of data signal lines to define a plurality of sub-pixels in an array; wherein the plurality of sub-pixels each comprises a pixel driving circuit, wherein the pixel driving circuit includes a driving transistor and an organic light emitting diode, wherein the organic light emitting diode has a threshold voltage for turning on; and an external compensation circuit comprising a power supply unit, a sampling unit and a data signal generation unit, wherein the external compensation circuit connects to the plurality of data signal lines, and transmits a compensated data signal via the plurality of data signal lines to the pixel driving circuit of each of the plurality of sub-pixels in a number of periods to compensate for the threshold voltage in a threshold compensation phase; wherein the power supply unit provides a current signal to the driving transistor and/or the organic light emitting diode of each of the plurality of sub-pixels; wherein the sampling unit samples a voltage signal of the driving transistor and/or the organic light emitting diode of each of the plurality of sub-pixels based on a current signal provided by the power supply unit, and compares the voltage signal with a pre-stored characteristic curve of the driving transistor and/or a characteristic curve of the organic light emitting diode of each of the plurality of sub-pixels to determine a degraded voltage of the driving transistor and/or the organic light emitting diode; and wherein the data signal generation unit generates the compensated data signal based on the degraded voltage of the driving transistor and/or the organic light emitting diode of each of the plurality of sub-pixels determined by the sampling unit, and provides the compensated data signal to the pixel driving circuits of each of the plurality of sub-pixels; wherein the display panel further comprising a first switch unit, a second switch unit, and a third switch unit; wherein the first switch unit comprises a plurality of first switches, each first switch-is turned on or turned off between the power supply unit and an associated data signal line of the plurality of data signal lines; wherein the second switch unit comprises a plurality of second switches, each second switch is turned on or turned off between the sampling unit and an associated data signal line of the plurality of data signal lines; and wherein the third switch unit comprises a plurality of third switches, each third switch is turned on or turned off between the data signal generation unit and an associated data signal line of the plurality of data signal lines; wherein in a first period of the threshold compensation phase, the first switch unit is turned on and sends out a first signal under control of a control terminal of the first switch unit, the second switch unit and the third switch unit are turned off, the power supply unit of the external compensation circuit transmits a fixed current signal to the associated data signal line connected thereto in response to the first signal from the control terminal of the first switch unit, and the associated data signal line transmits the current signal to a first node and a second node of the pixel driving circuit, terminal voltages at the first node and the second node change accordingly, after the power supply unit detects that a voltage of the first node is unchanged relative to a reference potential, the first switch unit is turned off; wherein in a second period of the threshold compensation phase, the second switch unit is turned on and sends out a second signal under control of a control terminal of the second switch unit, the first switch unit and the third switch unit are turned off, sampling unit of the external compensation circuit connected to the data signal line samples a voltage signal from the data signal line, and the voltage signal is a saturated voltage of the first node relative to the reference potential in the previous period; and wherein a timing in a third period of the threshold compensation phase is the same as the first period of the threshold compensation phase, and a timing in a fourth period of the threshold compensation phase is the same as the second period of the threshold compensation phase, wherein the third switch unit is turned on and sends out a third signal under control of a control terminal of the third switch unit, the first switch unit and the second switch unit are turned off, wherein a date signal generated by the data signal generation unit is transmitted to the associated data signal line, in response to the third signal from the control terminal of the third switch unit. 2. The display panel according to claim 1 , wherein the power supply unit comprises a current source and/or a voltage source. 3. The display panel according to claim 1 , wherein each of the plurality of first switches, the plurality of second switches, and the plurality of third switches is a transistor. 4. The display panel according to claim 1 , wherein the external compensation circuit further comprises an analog-to-digital converter configured to convert an analog signal sampled by the sampling unit into a digital signal, and transmit the converted signal to the data signal generation unit. 5. The display panel according to claim 1 , further comprising a display region and a non-display region, wherein the external compensation circuit is arranged in the non-display region, and the sub-pixels are arranged in the display region. 6. The display panel according to claim 1 , further comprising, a light emission control signal line, a detection signal line, a first source voltage signal line, and a second source voltage signal line. 7. The display panel according to claim 6 , the pixel driving circuit further comprises a data write unit, a threshold compensation unit, a storage unit, a light emission control unit and a first and a second electrodes; wherein the first electrode of the driving transistor is connected to the first source voltage signal line; wherein the data write unit connects to one associated data signal line and the gate of the driving transistor, and transmits a signal from the associated data signal line to the gate of the driving transistor based on a signal from the scan signal line; wherein the threshold compensation unit connects to the associated data signal line and the second electrode of the driving transistor, and transmits the signal from the associated data signal line to the second electrode of the driving transistor based on a signal from the detection signal line; wherein the storage unit is connected to the driving transistor and the first source voltage signal line, and configured to store signals transmitted to the driving transistor; wherein the light emission control unit connects to the second electrode of the driving transistor and an anode of the organic light emitting diode, and controls light emission of the organic light emitting diode based on a signal from the light emission control signal line; and a cathode of the organic light emitting diode is connected to the second source voltage signal line. 8. The display panel according to claim 7 , wherein the data write unit comprises a first transistor, a gate of the first transistor is connected to the scan signal line, a first electrode of the first transistor is connected to the data signal line, and a second electrode of the first transistor connects to the gate of the driving transistor. 9. The display panel according to claim 7 , wherein the threshold compensation unit comprises a second transistor, a gate of the sec

Assignees

Inventors

Classifications

  • Details of flat display driving waveforms · CPC title

  • Calculation or use of calculated indices related to luminance levels in display data · CPC title

  • Test circuits or failure detection circuits included in a display system, as permanent part thereof · CPC title

  • Compensation of drifts in the characteristics of light emitting or modulating elements · CPC title

  • Several active elements per pixel in active matrix panels · CPC title

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What does patent US10769992B2 cover?
The present application discloses a display panel and a display device. The display panel comprises a plurality of data signal lines; a plurality of scan signal lines intersecting with the plurality of data signal lines, to define a plurality of sub-pixels in an array, and each of the sub-pixels comprising a pixel driving circuit, and an external compensation circuit, comprising a power supply …
Who is the assignee on this patent?
Shanghai Tianma Am Oled Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3233. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 08 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).