Storage of database dictionary structures in non-volatile memory

Patent metadata

Field	Value
Publication number	US-10769075-B2
Application number	US-201816197851-A
Country	US
Kind code	B2
Filing date	Nov 21, 2018
Priority date	May 10, 2018
Publication date	Sep 8, 2020
Grant date	Sep 8, 2020

Abstract

A system includes storage, in a volatile random access memory, of a first data block comprising an array of distinct values of a database table column, and first header data comprising a first pointer to the first data block, determination of a memory size associated with the first header data and the first data block, allocation of a first memory block of the non-volatile random access memory based on the determined memory size, determination of an address of the non-volatile random access memory associated with the allocated first memory block, and writing of an indicator of the number of distinct values of the array and a binary copy of the first data block at the address of the non-volatile random access memory.

First claim

What is claimed is:

1. A database system comprising:
a volatile random access memory storing first header data, and storing a first data block comprising an array of distinct values of a database table column, and with the first header data comprising a first pointer to the first data block;
a non-volatile random access memory; and
a processing unit to:
determine a memory size associated with the first header data and the first data block;
allocate a first memory block of the non-volatile random access memory based on the determined memory size;
determine an address of the non-volatile random access memory associated with the allocated first memory block; and
write an indicator of the number of distinct values of the array and a binary copy of the first data block at the address of the non-volatile random access memory,

wherein the first data block comprises a first number of logical blocks storing the array of distinct values,
wherein the volatile random access memory further stores a second data block comprising a second number of logical blocks storing a second array of distinct values of a database table column, and a data structure specifying, for each of the logical blocks of the first data block and the second data block, a number of the data block which includes the logical block and an offset at which the logical block is located in the data block,
wherein the first header data comprises a second pointer to the second data block, and a third pointer to the data structure, and
wherein writing of the indicator of the number of distinct values of the array and the binary copy of the first data block at the address of the non-volatile random access memory comprises contiguously writing, from the address of the non-volatile random access memory, descriptive information of the first data block, a number of alignment bits, the binary copy of the first data block, descriptive information of the second data block, a second number of alignment bits, a binary copy of the second data block, descriptive information of the data structure, a third number of alignment bits, and a binary copy of the data structure.

2. A database system according to claim 1 , wherein determination of the memory size comprises determination of the number of alignment bits based on a size of the descriptive information to be written to the non-volatile random access memory and on a desired bit alignment of a start address of the binary copy of the first data block in the non-volatile random access memory.

3. A database system according to claim 2 , the processing unit further to:
determine the address associated with the allocated first memory block of the non-volatile random access memory;
deserialize the descriptive information written at the address associated with the allocated first memory block of the non-volatile random access memory;
copy the deserialized descriptive information into second header data stored in the volatile random access memory;
determine a pointer to the start address of the binary copy of the first data block in the non-volatile random access memory; and
store the pointer in the second header data stored in the volatile random access memory.

4. A database system according to claim 3 , wherein determination of the pointer to the start address comprises determination of a next memory address following the descriptive information written at the address associated with the allocated first memory block of the non-volatile random access memory and having the desired bit alignment.

5. A database system according to claim 1 , wherein determination of the memory size comprises determination of the number of alignment bits based on a desired bit alignment of a start address of the binary copy of the first data block in the non-volatile random access memory, determination of the second number of alignment bits based on a desired bit alignment of a start address of the binary copy of the second data block in the non-volatile random access memory, and determination of the third number of alignment bits based on a desired bit alignment of a start address of the binary copy of the data structure in the non-volatile random access memory, and
the processing unit further to:
determine the address associated with the allocated first memory block of the non-volatile random access memory;
determine a first pointer to the start address of the binary copy of the first data block in the non-volatile random access memory;
determine a second pointer to the start address of the binary copy of the second data block in the non-volatile random access memory;
determine a third pointer to the start address of the binary copy of the data structure in the non-volatile random access memory; and
store the first pointer, the second pointer and the third pointer in second header data stored in the volatile random access memory.

6. A computer-implemented method, comprising:
storing, in a volatile random access memory, a first data block comprising an array of distinct values of a database table column, and first header data comprising a first pointer to the first data block;
determining a memory size associated with the first header data and the first data block;
allocating a first memory block of the non-volatile random access memory based on the determined memory size;
determining an address of the non-volatile random access memory associated with the allocated first memory block; and
writing an indicator of the number of distinct values of the array and a binary copy of the first data block at the address of the non-volatile random access memory,
wherein the first data block comprises a first number of logical blocks storing the array of distinct values,
wherein the volatile random access memory further stores a second data block comprising a second number of logical blocks storing a second array of distinct values of a database table column, and a data structure specifying, for each of the logical blocks of the first data block and the second data block, a number of the data block which includes the logical block and an offset at which the logical block is located in the data block,
wherein the first header data comprises a second pointer to the second data block, and a third pointer to the data structure, and
wherein writing the indicator of the number of distinct values of the array and the binary copy of the first data block at the address of the non-volatile random access memory comprises contiguously writing, from the address of the non-volatile random access memory, descriptive information of the first data block, a number of alignment bits, the binary copy of the first data block, descriptive information of the second data block, a second number of alignment bits, a binary copy of the second data block, descriptive information of the data structure, a third number of alignment bits, and a binary copy of the data structure.

7. A method according to claim 6 , wherein determining the memory size comprises determining the number of alignment bits based on a size of the descriptive information to be written to the non-volatile random access memory and on a desired bit alignment of a start address of the binary copy of the first data block in the non-volatile random access memory.

8. A method according to claim 7 , further comprising:
determining the address associated with the allocated first memory block of the non-volatile random access memory;
deserializing the descriptive information written at the address associated with the allocated first memory block of the non-volatile random access memory;
copying the deserialized descriptive information into second header data stored in the volatile random access memory;
determining a pointer to the start a

Assignees

• Sap Se

Inventors

• Thiel Carsten
• Radestock Guenter
• Richtarsky Martin
• Scheirle Bernhard

Classifications

• G06F3/0685

  Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays · CPC title

• G06F16/24569

  Query processing with adaptation to specific hardware, e.g. adapted for using GPUs or SSDs · CPC title

• G06F12/0246

  in block erasable memory, e.g. flash memory · CPC title

• G06F2212/1008

  Correctness of operation, e.g. memory ordering · CPC title

• G06F2212/7202

  Allocation control and policies · CPC title