Array substrate comprising a plurality of first pixel electrode strips and first common electrode strips arranged symmetrically with respect to a sub-area symmetry axis of a pixel unit sub-area and manufacture method thereof, display panel and display device

Patent metadata

Field	Value
Publication number	US-10768491-B2
Application number	US-201715757492-A
Country	US
Kind code	B2
Filing date	Aug 2, 2017
Priority date	Jan 20, 2017
Publication date	Sep 8, 2020
Grant date	Sep 8, 2020

Abstract

An array substrate and a manufacture method thereof, a display panel and a display device. The array substrate includes pixel units. Each pixel unit includes a pixel electrode and a common electrode, which are respectively includes first pixel electrode strips and first common electrode strips that are arranged substantially in parallel in parallel in a first direction, each first common electrode strip overlaps at least one first pixel electrode strip. Each pixel unit includes at least one pixel unit sub-area, which has a sub-area symmetry axis, the first pixel electrode strip and the first common electrode strip are respectively arranged with respect to the sub-area symmetry axis symmetrically. On either side of the sub-area symmetry axis, the first common electrode strip is farther away from or closer to the sub-area symmetry axis than the at least one first pixel electrode strip that the each first common electrode strip overlaps.

First claim

What is claimed is:

1. An array substrate, comprising:
a base substrate, and a plurality of pixel units that are arranged in an array on the base substrate, wherein each of the pixel units comprises:
a pixel electrode, wherein the pixel electrode comprises a plurality of first pixel electrode strips and a plurality of first slits that are arranged between adjacent first pixel electrode strips, and the plurality of first pixel electrode strips are arranged substantially in parallel in a first direction;
a common electrode that is arranged in a different layer from the pixel electrode, wherein the common electrode comprises a plurality of first common electrode strips and a plurality of second slits that are arranged between adjacent first common electrode strips, and the plurality of first common electrode strips are arranged substantially in parallel in the first direction,
wherein each of the first common electrode strips overlaps at least one of the first pixel electrode strips;
each pixel unit comprises at least one pixel unit sub-area, the pixel unit sub-area has a sub-area symmetry axis, the first pixel electrode strips of the pixel electrode in the pixel unit sub-area are arranged with respect to the sub-area symmetry axis symmetrically, and the first common electrode strips of the common electrode in the pixel unit sub-area are arranged with respect to the sub-area symmetry axis symmetrically,
in the pixel unit sub-area, on either side of the sub-area symmetry axis, a center line, which is extended in an extending direction of each first common electrode strip, of the each first common electrode strip is farther away from or closer to the sub-area symmetry axis than a center line, which is extended in an extending direction of the at least one of the first pixel electrode strips, of the at least one of the first pixel electrode strips that the each first common electrode strip overlaps.

2. The array substrate according to claim 1 , wherein
the base substrate is arranged on a side of the common electrode that is away from the pixel electrode or on a side of the pixel electrode that is away from the common electrode.

3. The array substrate according to claim 1 , wherein
the first direction is parallel to a column direction of the plurality of pixel units that are arranged in an array.

4. The array substrate according to claim 1 , wherein
an extending direction of the first pixel electrode strips and an extending direction of the first common electrode strips are parallel to a row direction of the plurality of pixel units that are arranged in an array.

5. The array substrate according to claim 1 , wherein
each of the first common electrode strips overlaps one of the first pixel electrode strips, and in the pixel unit sub-area, on either side of the sub-area symmetry axis, each first common electrode strip is farther away from or closer to the sub-area symmetry axis than the first pixel electrode strip that the each first common electrode strip overlaps.

6. The array substrate according to claim 1 , wherein
the pixel electrode further comprises at least one second pixel electrode strip that electrically connects the plurality of first pixel electrode strips, and
the common electrode further comprises at least one second common electrode strip that electrically connects the plurality of first common electrode strips.

7. The array substrate according to claim 1 , wherein
each pixel unit comprises at least two pixel unit sub-areas, and each pixel unit has a pixel area symmetry axis extending in a row direction of the pixel units, and the at least two pixel unit sub-areas are symmetrically arranged with respect to the pixel area symmetry axis.

8. An array substrate, comprising:
a base substrate, and a plurality of pixel units that are arranged in an array on the base substrate, wherein each of the pixel units comprises:
a pixel electrode, wherein the pixel electrode comprises a plurality of first pixel electrode strips and a plurality of first slits that are arranged between adjacent first pixel electrode strips, and the plurality of first pixel electrode strips are arranged substantially in parallel in a first direction;
a common electrode that is arranged in a different layer from the pixel electrode, wherein the common electrode comprises a plurality of first common electrode strips and a plurality of second slits that are arranged between adjacent first common electrode strips, and the plurality of first common electrode strips are arranged substantially in parallel in the first direction,
wherein each of the first common electrode strips overlaps at least one of the first pixel electrode strips;
each pixel unit comprises at least one pixel unit sub-area, the pixel unit sub-area has a sub-area symmetry axis, the first pixel electrode strips of the pixel electrode in the pixel unit sub-area are arranged with respect to the sub-area symmetry axis symmetrically, and the first common electrode strips of the common electrode in the pixel unit sub-area are arranged with respect to the sub-area symmetry axis symmetrically,
in the pixel unit sub-area, on either side of the sub-area symmetry axis, each first common electrode strip is farther away from or closer to the sub-area symmetry axis than the at least one of the first pixel electrode strips that the each first common electrode strip overlaps;

the first direction is parallel to a column direction of the plurality of pixel units that are arranged in an array;
a width W 1 of the first pixel electrode strip in the first direction and a width W 2 of the first common electrode strip in the first direction satisfy the following condition:
n *( W 1+ S 1)=( W 2+ S 2)
wherein S 1 is an interval distance of the first pixel electrode strips that are arranged on either side of the sub-area symmetry axis in the first direction, S 2 is an interval distance of the first common electrode strips that are arranged on either side of the sub-area symmetry axis in the first direction, and n is an integer that is greater than or equal to two.

9. A display panel, comprising the array substrate according to claim 1 .

10. A display device, comprising the display panel according to claim 9 .

11. A manufacture method of the array substrate according to claim 1 , comprising:
providing a base substrate;
forming a plurality of pixel units that are arranged in an array on the base substrate, wherein each of the pixel units comprises:
a pixel electrode, wherein the pixel electrode comprises a plurality of first pixel electrode strips and a plurality of first slits that are arranged between adjacent first pixel electrode strips, and the plurality of first pixel electrode strips are arranged substantially in parallel in a first direction;
a common electrode that is arranged in a different layer from the pixel electrode, wherein the common electrode comprises a plurality of first common electrode strips and a plurality of second slits that are arranged between adjacent first common electrode strips, and the plurality of first common electrode strips are arranged substantially in parallel in the first direction,
wherein each of the first common electrode strips overlaps at least one of the first pixel electrode strips;
each pixel unit comprises at least one pixel unit sub-area, the pixel unit sub-area has a sub-area symmetry axis, the first pixel electrode strips of the pixel electrode in the pixel unit sub-area are arranged with respect to the sub-area symmetry axis symmetrically, and the first common electrode strips of the common electrode in the pixel unit sub-area are arranged with respect to the sub-area symmetry axis symmetrically,

Assignees

• Boe Technology Group Co Ltd
• Chongqing Boe Optoelectronics Tech Co Ltd

Inventors

• Li Peng
• Park Jungho
• Kim Heecheol
• Kim Jaikwang

Classifications

• G02F1/134309 Primary

  characterised by their geometrical arrangement · CPC title

• G02F1/136295

  Materials; Compositions; Manufacture processes · CPC title

• G02F1/134318

  having a patterned common electrode · CPC title

• G02F1/1343

  Electrodes {(reflective electrodes G02F1/133553)} · CPC title

• G02F1/1362

  Active matrix addressed cells {(G02F1/134336, G02F1/134363 take precedence)} · CPC title