Waveform shaping circuit, semiconductor device, and switching power supply device

US10763737B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10763737-B2
Application numberUS-201916248876-A
CountryUS
Kind codeB2
Filing dateJan 16, 2019
Priority dateMar 20, 2018
Publication dateSep 1, 2020
Grant dateSep 1, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A waveform shaping circuit includes a first variable gate voltage circuit that controls a minimum voltage of a pulse voltage based on a drain current or a source current of a field effect transistor, the pulse voltage having a positive or negative value and being applied to a gate of the field effect transistor, and a second variable gate voltage circuit that controls a maximum voltage of the pulse voltage based on the drain current or the source current.

First claim

Opening claim text (preview).

What is claimed is: 1. A waveform shaping circuit comprising: a first variable gate voltage circuit configured to control a pulse signal to be applied to a gate of a field effect transistor, one unit of the pulse signal being formed by a first voltage level and a second voltage level, the first voltage level being less in voltage value than the second voltage level, the first voltage level being controlled by the first variable gate voltage circuit in accordance with a drain current or a source current of the field effect transistor; and a second variable gate voltage circuit configured to control the second voltage level of the pulse signal based on the drain current or the source current, the first variable gate voltage circuit includes: a first parallel circuit that includes a first capacitative element and a first resistive element coupled in parallel, a first terminal configured to be applied with an input voltage, and a second terminal electrically coupled to a gate terminal of the field effect transistor; a first Zener diode; one or a plurality of second Zener diodes coupled in series between the second terminal of the first parallel circuit and an anode of the first Zener diode; a plurality of first switches, each of which includes one end coupled to a cathode of one of the one or plurality of second Zener diodes, and the other end coupled to the second terminal; and a first switch control circuit configured to control ON and OFF of the plurality of first switches based on the drain current or the source current, and the second variable gate voltage circuit includes: a second parallel circuit that includes a second capacitative element and a second resistive element coupled in parallel, a third terminal configured to provide a reference potential, and a fourth terminal configured to be coupled to a cathode of the first Zener diode; a third Zener diode including an anode configured to provide the reference potential; one or a plurality of fourth Zener diodes coupled in series between the fourth terminal of the second parallel circuit and a cathode of the third Zener diode; a plurality of second switches, each of the plurality of second switches including one end and other end, the one end being coupled to a cathode of one of the one or plurality of fourth Zener diodes, the other end being configured to provide a reference potential; and a second switch control circuit configured to control ON and OFF of the plurality of second switches based on the drain current or the source current. 2. The waveform shaping circuit according to claim 1 , wherein when the drain current or the source current decreases, the first variable gate voltage circuit causes the first voltage level to drop, and the second variable gate voltage circuit causes the second voltage level to rise. 3. A semiconductor device comprising: a field effect transistor; and a waveform shaping circuit that includes a first variable gate voltage circuit and a second variable gate voltage circuit, the first variable gate voltage circuit configured to control a pulse signal to be applied to a gate of the field effect transistor, one unit of the pulse signal being formed by a first voltage level and a second voltage level, the first voltage level being less in voltage value than the second voltage level, the first voltage level being controlled by the first variable gate voltage circuit in accordance with a drain current or a source current of the field effect transistor, the second variable gate voltage circuit configured to control the second voltage level of the pulse signal based on the drain current or the source current, the first variable gate voltage circuit includes: a first parallel circuit that includes a first capacitative element and a first resistive element coupled in parallel, a first terminal configured to be applied with an input voltage, and a second terminal electrically coupled to a gate terminal of the field effect transistor; a first Zener diode; one or a plurality of second Zener diodes coupled in series between the second terminal of the first parallel circuit and an anode of the first Zener diode; a plurality of first switches, each of which includes one end coupled to a cathode of one of the one or plurality of second Zener diodes, and the other end coupled to the second terminal; and a first switch control circuit configured to control ON and OFF of the plurality of first switches based on the drain current or the source current, and the second variable gate voltage circuit includes: a second parallel circuit that includes a second capacitative element and a second resistive element coupled in parallel, a third terminal configured to provide a reference potential, and a fourth terminal configured to be coupled to a cathode of the first Zener diode; a third Zener diode including an anode configured to provide the reference potential; one or a plurality of fourth Zener diodes coupled in series between the fourth terminal of the second parallel circuit and a cathode of the third Zener diode; a plurality of second switches, each of the plurality of second switches including one end and other end, the one end being coupled to a cathode of one of the one or plurality of fourth Zener diodes, the other end being configured to provide a reference potential; and a second switch control circuit configured to control ON and OFF of the plurality of second switches based on the drain current or the source current. 4. A switching power supply device comprising: a field effect transistor configured to perform a switching operation; a control circuit configured to output a control signal which is a pulse voltage to be applied to a gate of the field effect transistor to control the switching operation of the field effect transistor, one unit of the control signal being formed by a first voltage level and a second voltage level, the first voltage level being less in voltage value than the second voltage level; and a waveform shaping circuit including a first variable gate voltage circuit and a second variable gate voltage circuit, the first variable gate voltage circuit being configured to control the first voltage level of the control signal based on a drain current or a source current of the field effect transistor, the second variable gate voltage circuit being configured to control the second voltage level of the control signal based on the drain current or the source current, the first variable gate voltage circuit includes: a first parallel circuit that includes a first capacitative element and a first resistive element coupled in parallel, a first terminal configured to be applied with an input voltage, and a second terminal electrically coupled to a gate terminal of the field effect transistor; a first Zener diode; one or a plurality of second Zener diodes coupled in series between the second terminal of the first parallel circuit and an anode of the first Zener diode; a plurality of first switches, each of which includes one end coupled to a cathode of one of the one or plurality of second Zener diodes, and the other end coupled to the second terminal; and a first switch control circuit configured to control ON and OFF of the plurality of first switches based on the drain current or the source current, and the second variable gate voltage circuit includes: a second parallel circuit that includes a second capacitative element and a second resistive element coupled in parallel, a third terminal configured to provide a reference potential, and a fourth terminal configured to be coupled to a cathode of the first Zener diode; a third Zener diode including an anode configured to provide the reference potential; one or a plurality of fourth Zener diodes coupled in series between the fourth terminal of the second p

Assignees

Inventors

Classifications

  • H02M1/4225Primary

    using a non-isolated boost converter · CPC title

  • H02M1/08Primary

    Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

  • Plural converter units in cascade (push-pull DC/DC converters with pre-regulator H02M3/3374; DC-AC converters following a DC-DC stage including a high frequency transformer H02M7/4807; DC-AC converters following a DC-DC conversion stage generating periodically varying voltages H02M7/4826) · CPC title

  • using a single converter stage both for correction of AC input power factor and generation of a regulated and galvanically isolated DC output voltage (H02M1/4241 takes precedence) · CPC title

  • Means for protecting converters other than automatic disconnection · CPC title

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What does patent US10763737B2 cover?
A waveform shaping circuit includes a first variable gate voltage circuit that controls a minimum voltage of a pulse voltage based on a drain current or a source current of a field effect transistor, the pulse voltage having a positive or negative value and being applied to a gate of the field effect transistor, and a second variable gate voltage circuit that controls a maximum voltage of the p…
Who is the assignee on this patent?
Fujitsu Ltd
What technology area does this patent fall under?
Primary CPC classification H02M1/4225. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).