Method for arranging current source array of digital-to-analog converter and layout of common-source current source array

Patent metadata

Field	Value
Publication number	US-10756750-B2
Application number	US-201816609578-A
Country	US
Kind code	B2
Filing date	Dec 10, 2018
Priority date	Dec 11, 2017
Publication date	Aug 25, 2020
Grant date	Aug 25, 2020

Abstract

A method for arranging a current source array of a DAC and a layout of a common-source current source array are provided in embodiments of the present disclosure for improving linearity and related performance of the DAC. The method includes, determining a number R of rows and a number C of columns of a common-source current source array; dividing the common-source current source array into M sub-arrays; segmenting the DAC to obtain (2X−1) groups of thermometer encoding current sources and Y groups of binary encoding current sources; arranging the (2X−1) groups of the thermometer encoding current sources into the M sub-arrays, arranging Y groups of binary encoding current sources into the M sub-arrays based on a number of binary encoding current sources in each of Y groups; arranging bias current sources evenly into the common-source current source array; and arranging other current sources as dummy cells.

First claim

What is claimed is:

1. A method for arranging a current source array of a current-steering digital-to-analog converter (DAC), wherein the DAC comprises N bits, and the method comprises:
determining a number R of rows and a number C of columns of a common-source current source array, wherein a product of R and C is greater than (2 N −1);
dividing the common-source current source array into M sub-arrays, wherein M>=4, M is a positive integer, and the M sub-arrays are symmetric with each other;
segmenting the DAC to obtain (2 X −1) groups of thermometer encoding current sources and Y groups of binary encoding current sources, wherein Y is a number of lower bits of the N bits, X is a number of higher bits of the N bits, and N is a sum of X and Y; and wherein the higher bits of the N bits use a thermometer encoding manner, and the lower bits of N bits use a binary encoding manner;
arranging the (2 X −1) groups of the thermometer encoding current sources into the M sub-arrays to make thermometer encoding current sources in each of the sub-arrays be symmetrical with thermometer encoding current sources in the other sub-arrays;
arranging Y groups of binary encoding current sources into the M sub-arrays based on a number of binary encoding current sources in each of Y groups;
arranging bias current sources evenly into the common-source current source array; and
arranging other current sources in the common-source current source array except the binary encoding current sources, the thermometer encoding current sources, and the bias current sources as dummy cells.

2. The method according to claim 1 , wherein each of the (2 X −1) groups comprises 2 Y thermometer encoding current source cells, and numbers of binary encoding current source cells in Y groups are 2 Y-1 , 2 Y-2 , . . . , 4, 2 and 1, respectively.

3. The method according to claim 1 , wherein arranging the (2 X −1) groups of thermometer encoding current sources into the M sub-arrays to make the thermometer encoding current sources in each of the sub-arrays be symmetrical with the thermometer encoding current sources in the other sub-arrays comprises:
arranging 2 Y thermometer encoding current source cells in each of the (2 X −1) groups evenly into the M sub-arrays; and
arranging the (2 X −1) groups of thermometer encoding current sources into each of the sub-arrays with a concentric manner, to make the thermometer encoding current sources in each of the sub-arrays be symmetrical with the thermometer encoding current sources in the other sub-arrays.

4. The method according to claim 1 , wherein arranging Y groups of binary encoding current sources into the M sub-arrays based on a number of binary encoding current sources in each of Y groups comprises:
when there is a first group in Y groups and a number of binary encoding current source cells in the first group is greater than or equal to M, arranging all binary encoding current source cells in the first group evenly to each of the sub-arrays, to make all binary encoding current source cells in the first group be symmetrical with respect to a central horizontal axis and a central vertical axis of the common-source current source array;
when there is a second group in Y groups and a number of binary encoding current source cells in the second group is less than M, arranging all the binary encoding current source cells in the second group in a central symmetry with respect to a center of the common-source current source array; and
when there is a third group in Y groups and a number of binary encoding current source cells in the third group is equal to 1, arranging the binary encoding current source cell in the third group near the central horizontal axis and the central vertical axis of the common-source current source array.

5. The method according to claim 1 , wherein the bias current sources are arranged in a central symmetry with respect to a center of the common source current source array, and the bias current sources are symmetrical with respect to the central horizontal axis and the central vertical axis of the common-source current source array.

6. The method according to claim 1 , wherein gates of all current source cells in the common-source current source array are connected to a bias voltage generated by the bias current sources, and sources of all the current source cells in the common-source current source array are connected to a power supply voltage.

7. The method according to claim 1 , wherein drains of all thermometer encoding current source cells in each group of the thermometer encoding current sources are connected, and drains of all the binary encoding current source cells in each group of the binary encoding current sources are connected.

8. The method according to claim 1 , wherein drains, sources, and gates of the dummy cells are connected to a power supply voltage.

9. The method according to claim 1 , wherein the bias current sources generate a bias voltage through a reference current.

10. A layout of a common-source current source array, applied to an N-bit current-steering digital-to-analog converter (DAC), comprising:
M sub-arrays;
wherein each of the M sub-arrays comprises: (2 X −1) groups of thermometer encoding current sources, Y groups of binary encoding current sources, bias current sources and dummy cells, and wherein M>=4, M is a positive integer, the M sub-arrays are symmetric with each other, each of the (2 X −1) groups comprises 2 Y thermometer encoding current source cells, numbers of binary encoding current source cells in each of Y groups are 2 Y-1 , 2 Y-2 , . . . , 4, 2 and 1, respectively, and wherein X is a number of higher bits of the N bits, Y is a number of lower bits of the N bits; and wherein the higher bits of the N bits use a thermometer encoding manner, and the lower bits of N bits use a binary encoding manner;
wherein the M sub-arrays further comprises: a binary encoding current source arranged based on a number of binary current source cells in each of Y groups;
wherein each group of thermometer encoding current sources in each of the sub-arrays is arranged with (2 Y /M) thermometer encoding current source cells, the (2 X −1) groups of thermometer encoding current sources in each of the sub-arrays are arranged concentrically, and thermometer encoding current source cells in each of the sub-arrays are arranged symmetrically with thermometer encoding current source cells in the other sub-arrays;
wherein the bias current sources are arranged in a central symmetry with respect to a center of the common source current source array, the bias current sources are symmetrical with respect to a central horizontal axis and a central vertical axis of the common-source current source array, and the bias current sources are configured to generate a bias voltage.

11. The layout according to claim 10 , further comprising:
a power supply voltage;
wherein the power supply voltage is connected to drains, sources, and gates of the dummy cells.

12. The layout according to claim 10 , wherein drains of all thermometer encoding current source cells in each group of the thermometer encoding current sources are connected, and drains of all the binary encoding current source cells in each group of the binary encoding current sources are connected.

13. The layout according to claim 11 , wherein gates of all current source cells in the common-source current source array are connected to a bias voltage generated by the bias current sources, and sources of all the current source cells in the common-source current source array are connected to a power supply voltage.

Assignees

• Beijing Spreadtrum Hi-Tech Communications Tech Co Ltd
• Beijing Unisoc Comm Tech Co Ltd

Inventors

• Han Te
• Qiao Junshi
• Lai Jiewei

Classifications

• H03M1/687

  Segmented, i.e. the more significant bit converter being of the unary decoded type and the less significant bit converter being of the binary weighted type · CPC title

• H03M1/742

  using current sources as quantisation value generators · CPC title

• G06F30/392

  Floor-planning or layout, e.g. partitioning or placement · CPC title

• G06F2119/06

  Power analysis or power optimisation · CPC title

• G06F30/00

  Computer-aided design [CAD] · CPC title