Display panel and display device

Patent metadata

Field	Value
Publication number	US-10756136-B1
Application number	US-201916591734-A
Country	US
Kind code	B1
Filing date	Oct 3, 2019
Priority date	Apr 30, 2019
Publication date	Aug 25, 2020
Grant date	Aug 25, 2020

Abstract

Provided are a display panel and display device. The display panel includes a first display area and a second display area adjacent to the first display area. The second display area is reused as a sensor reservation area. The second display area includes a plurality of light-transmissive areas and a plurality of pixel unit setting areas. A first trace area is disposed between two adjacent pixel unit setting areas in a first direction, a second trace area is disposed between two adjacent pixel unit setting areas in a second direction, and the first direction intersects with the second direction. The display panel further includes a base substrate and a light-blocking layer. The light-blocking layer is electrically connected to a preset voltage terminal.

First claim

What is claimed is:

1. A display panel, comprising a first display area and a second display area adjacent to the first display area, wherein the second display area is reused as a sensor reservation area, and the second display area comprises a plurality of light-transmissive areas and a plurality of pixel unit setting areas; and
a first trace area is disposed between two adjacent pixel unit setting areas in a first direction, a second trace area is disposed between two adjacent pixel unit setting areas in a second direction, and the first direction intersects with the second direction; and
wherein the display panel further comprises:
a base substrate, and
a light-blocking layer, wherein the light-blocking layer is electrically connected to a preset voltage terminal, and along a direction perpendicular to a plane in which the base substrate is located, projections of a gap between two adjacent first traces in the first trace area and a gap between two adjacent second traces in the second trace area on the base substrate are completely covered by a projection of the light-blocking layer on the base substrate.

2. The display panel of claim 1 , wherein each of the plurality of pixel unit setting areas comprises at least one pixel unit, and each of the at least one pixel unit comprises a plurality of sub-pixels of different light-emitting colors;
each of the plurality of sub-pixels comprises a light-emitting element, wherein the light-emitting element comprises an anode, a light-emitting layer and a cathode that are sequentially stacked;
a first trace is disposed on one side of the second trace facing towards the anode; and
the light-blocking layer is disposed between a film layer where the first trace is located and a film layer where the anode is located.

3. The display panel of claim 1 , wherein the base substrate comprises a flexible substrate,
wherein the flexible substrate comprises a first flexible substrate and a second flexible substrate; and
wherein the light-blocking layer is disposed between the first flexible substrate and the second flexible substrate.

4. The display panel of claim 2 , wherein the light-blocking layer comprises a plurality of first light-blocking portions for covering the first trace area, a plurality of second light-blocking portions for covering the second trace area, and a third light-blocking portion for covering the plurality of pixel unit setting areas;
wherein the first display area comprises a plurality of first power voltage lines extending in the first direction and the second direction, the plurality of first light-blocking portions and the plurality of second light-blocking portions extend to the first display area, both the plurality of first light-blocking portions and the plurality of second light-blocking portions are electrically connected to the plurality of first power voltage lines, and the plurality of first light-blocking portions, the plurality of second light-blocking portions and the third light-blocking portion are connected to each other; and
wherein the preset voltage terminal is a power voltage terminal.

5. The display panel of claim 3 , wherein the light-blocking layer comprises a plurality of first light-blocking portions for covering the first trace area, a plurality of second light-blocking portions for covering the second trace area, and a third light-blocking portion for covering the plurality of pixel unit setting areas;
wherein the first display area comprises a plurality of first power voltage lines extending in the first direction and the second direction, the plurality of first light-blocking portions and the plurality of second light-blocking portions extend to the first display area, both the plurality of first light-blocking portions and the plurality of second light-blocking portions are electrically connected to the plurality of first power voltage lines, and the plurality of first light-blocking portions, the plurality of second light-blocking portions and the third light-blocking portion are connected to each other; and
wherein the preset voltage terminal is a power voltage terminal.

6. The display panel of claim 1 , wherein each of the plurality of pixel unit setting areas comprises at least one pixel unit, and each of the at least one pixel unit comprises a plurality of sub-pixels of different light-emitting colors;
wherein each of the plurality of sub-pixels comprises a light-emitting element, wherein the light-emitting element comprises an anode, a light-emitting layer and a cathode that are sequentially stacked; and
wherein the light-blocking layer and the anode are disposed in a same layer.

7. The display panel of claim 6 , wherein each of the plurality of pixel unit setting areas comprise a driving circuit setting area;
wherein the light-blocking layer comprises a fourth light-blocking portion for covering the first trace area, a fifth light-blocking portion for covering the second trace area and a sixth light-blocking portion for covering the driving circuit setting area;
wherein the first display area comprises a plurality of preset voltage lines extending in the first direction and the second direction, the fourth light-blocking portion and the fifth light-blocking portion extend to the first display area, both the fourth light-blocking portion and the fifth light-blocking portion are electrically connected to the plurality of preset voltage lines, and the fourth light-blocking portion, the fifth light-blocking portion and the sixth light-blocking portion are connected to each other; and
wherein the preset voltage terminal is a power voltage terminal or a ground terminal.

8. The display panel of claim 7 , wherein the preset voltage terminal is a power voltage terminal, and the plurality of preset voltage lines are second power voltage lines; and
wherein the second display area further comprises a plurality of third power voltage lines extending in the first direction and the second direction, and the plurality of third power voltage lines are electrically connected to the second power voltage lines.

9. The display panel of claim 1 , wherein along the direction perpendicular to the plane in which the base substrate is located, projections of the first trace area and the second trace area on the base substrate are completely covered by the orthographic projection of the light-blocking layer on the base substrate.

10. The display panel of claim 1 , wherein along the direction perpendicular to the plane in which the base substrate is located, projections of the first trace area, the second trace area and the pixel unit setting area on the base substrate are completely covered by the orthographic projection of the light-blocking layer on the base substrate.

11. The display panel of claim 1 , wherein the light-blocking layer comprises a metal light-blocking layer.

12. The display panel of claim 1 , further comprising a cathode layer, wherein the cathode layer comprises a plurality of openings in the second display area, and orthographic projections of the plurality of openings on the base substrate at least partially coincide with orthographic projections of the plurality of light-transmissive areas on the base substrate.

13. The display panel of claim 1 , wherein each of the plurality of pixel unit setting areas comprises at least one pixel unit, and each of the at least one pixel unit comprises a plurality of sub-pixels of different light-emitting colors;
each of the plurality of sub-pixels comprises a light-emitting element, wherein the light-emitting element comprises a Micro-light-emitting diode (LED) or an organic light-emitting diode.

Assignees

• Wuhan Tianma Micro Electronics Co Ltd

Inventors

• Ma Yangzhao
• Yang Xingxing
• Dun Dongliang

Classifications

• H10W90/00 Primary

  Package configurations · CPC title

• H10K59/131

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K59/8792

  comprising light absorbing layers, e.g. black layers · CPC title

• H10H29/142

  Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title

• H10F55/15

  wherein the radiation-sensitive devices and the electric light source are all semiconductor devices · CPC title