Symmetrically programmable resistive synapse for RPU using current-programmed single domain wall ferroelectric

Patent metadata

Field	Value
Publication number	US-10755759-B2
Application number	US-201816021575-A
Country	US
Kind code	B2
Filing date	Jun 28, 2018
Priority date	Jun 28, 2018
Publication date	Aug 25, 2020
Grant date	Aug 25, 2020

Abstract

A circuit is provided. The circuit includes a ferroelectric tunneling junction (“FTJ”) coupled in series with a YR read line. The circuit also includes a pull-up circuit having a write line YW as a first input with an output in series with the FTJ, and a pull-down circuit having the write line YW as a first input with an output in series with the second side of the FTJ.

First claim

What is claimed is:

1. A method of operating a ferroelectric tunneling (“FTJ”), the method comprising:
receiving, using a memory controller, a command;
determining, using a memory controller, that the command is a write up command, a write down command, or a read command;
based at least in part on the command being a write up command, removing, using a memory controller, charge from the FTJ with a substantially constant current removed over a period of time; and
based at least in part on the command being a write down command, adding, using a memory controller, charge to the FTJ with a substantially constant current added over a period of time.

2. The method of claim 1 , wherein removing charge from the FTJ comprises turning off a pull-up circuit and turning on a pull-down circuit.

3. The method of claim 1 , wherein removing charge from the FTJ comprises turning on a pull-up circuit and turning off a pull-down circuit.

4. The method of claim 2 , wherein turning off a pull-up circuit comprises receiving a one as an input to the pull-up circuit on a write line (“YW”) and on a write up line (“XP”) coupled to the pull-up circuit.

5. The method of claim 2 , wherein turning on a pull-down circuit comprises receiving a one as an input to the pull-down circuit on a write line (“YW”) and a voltage as an input on a write down line (“XN”) coupled to the pull-down circuit.

6. The method of claim 3 , wherein turning on a pull-up circuit comprises receiving a 0 as an input to the pull-up circuit on a write line (“YW”) and a voltage as an input on a write up line (“XP”) coupled to the pull-up circuit.

7. The method of claim 3 , wherein turning off a pull-down circuit comprises receiving a 0 as an input to the pull-down circuit on a write line (“YW”) and a zero to a write down line (“XN”) as an input coupled to the pull-down circuit.

8. The method of claim 1 , wherein, based at least in part on a determination that the command is a read command, turning off a pull-up circuit and turning off a pull-down circuit.

9. The method of claim 8 , wherein the pull-up circuit is turned off by providing a 1 on a write up line (“XP”) as an input to the pull-up circuit and a 0 on a write down line (“XN”) as an input to the pull-down circuit.

10. The method of claim 1 , wherein, based at least in part on a determination that the command is a read command, turning on an NFET in series with the FTJ and coupled to a read line (“XR”).

11. The method of claim 10 further comprising reading a charge across the FTJ.

Assignees

• IBM

Inventors

• Frank Martin M
• Han Jin-Ping
• Newns Dennis M
• Solomon Paul M
• Sun Xiao

Classifications

• G06N3/065

  Analogue means · CPC title

• G11C11/2273

  Reading or sensing circuits or methods · CPC title

• G11C11/2275

  Writing or programming circuits or methods · CPC title

• G06N3/049

  Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs · CPC title

• G11C11/54

  using elements simulating biological cells, e.g. neuron · CPC title