Techniques to manage cache resource allocations for a processor cache

Patent metadata

Field	Value
Publication number	US-10754783-B2
Application number	US-201816024611-A
Country	US
Kind code	B2
Filing date	Jun 29, 2018
Priority date	Jun 29, 2018
Publication date	Aug 25, 2020
Grant date	Aug 25, 2020

Abstract

Examples include techniques to manage cache resource allocations associated with one or more cache class of service (CLOS) assignments for a processor cache. Examples include flushing portions of an allocated cache resource responsive to reassignments of CLOS.

First claim

What is claimed is:

1. An apparatus comprising:
circuitry at a computing platform, the circuitry to execute logic to:
detect that a first application executed by a processor hosted by the computing platform has been reassigned from a first class of service (CLOS) to a second CLOS, the second CLOS allocated less cache resources of the processor compared to the first CLOS;
detect that a second application executed by the processor has been reassigned from a third CLOS to a fourth CLOS, the fourth CLOS to include cache resources previously allocated to the first CLOS; and

cause only data belonging to the first application that remains in the cache resources previously allocated to the first CLOS to be flushed such that all cache resources allocated to the fourth CLOS no longer include any data that belongs to the first application,
wherein to cause the data belonging to the first application to be flushed comprises the circuitry to:
isolate the cache resources previously allocated to the first CLOS such that the second application does not have access to the isolated cache resources allocated to the fourth CLOS;
overwrite all data in the isolated cache resources;
cause all the data in the isolated cache resources to be flushed; and
remove the isolation of the cache resources to allow the second application to have access to all cache resources allocated to the fourth CLOS.

2. The apparatus of claim 1 , comprising the allocated cache resources allocated from an n-way set associative last level cache (LLC) for the processor, where “n” is any whole, positive number greater than 1.

3. The apparatus of claim 1 , further comprising the logic to:
cause all data in the isolated cache resources to be overwritten with random values before all the data in the isolated cache resources is caused to be flushed.

4. The apparatus of claim 1 , further comprising the logic to:
send a cache line flush (CLFLUSH)/CLFLUSH operation (CLFLUSHOPT) instruction to the processor to cause all the data in the isolated cache resources to be flushed.

5. The apparatus of claim 1 , the first application comprising a virtual network function (VNF) application to fulfill a workload as part of providing a network service.

6. The apparatus of claim 5 , the network service comprising a database network service, a website hosting network service, a routing network service, an e-mail network service, a firewalling service, a domain name service (DNS), a caching service, a network address translation (NAT) service or virus scanning network service.

7. The apparatus of claim 1 , comprising a digital display remotely coupled to the circuitry to present a user interface view.

8. A method comprising:
detecting, at a processor circuit for a computing platform, that a first application executed by a processor hosted by the computing platform has been reassigned from a first class of service (CLOS) to a second CLOS, the second CLOS allocated less cache resources of the processor compared to the first CLOS;
detecting that a second application executed by the processor has been reassigned from a third CLOS to a fourth CLOS, the fourth CLOS including cache resources previously allocated to the first CLOS; and
causing data belonging to the first application that remains in the cache resources previously allocated to the first CLOS to be flushed such that all cache resources allocated to the fourth CLOS no longer include any data belonging to the first application,
wherein causing the data belonging to the first application to be flushed comprises:
isolating the cache resources previously allocated to the first CLOS such that the second application does not have access to the isolated cache resources allocated to the fourth CLOS;
overwriting all data in the isolated cache resources;
causing all the data in the isolated cache resources to be flushed; and
removing the isolation of the cache resources to allow the second application to have access to all cache resources allocated to the fourth CLOS.

9. The method of claim 8 , comprising the allocated cache resources allocated from an n-way set associative last level cache (LLC) for the processor, where “n” is any whole, positive number greater than 1.

10. The method of claim 8 , further comprising:
causing all data in the isolated cache resources to be overwritten with random values before all the data in the isolated cache resources is caused to be flushed.

11. The method of claim 8 , comprising:
sending a cache line flush (CLFLUSH)/CLFLUSH operation (CLFLUSHOPT) instruction to the processor to cause all the data in the isolated cache resources to be flushed.

12. The method of claim 8 , the first application comprising a virtual network function (VNF) application to fulfill a workload as part of providing a network service.

13. The method of claim 12 , the network service comprising a database network service, a website hosting network service, a routing network service, an e-mail network service, a firewalling service, a domain name service (DNS), a caching service, a network address translation (NAT) service or virus scanning network service.

14. At least one non-transitory machine readable medium comprising a plurality of instructions that in response to being executed by a system at a computing platform cause the system to:
detect that a first application executed by a processor hosted by the computing platform has been reassigned from a first class of service (CLOS) to a second CLOS, the second CLOS allocated less cache resources of the processor compared to the first CLOS;
detect that a second application executed by the processor has been reassigned from a third CLOS to a fourth CLOS, the fourth CLOS to include cache resources previously allocated to the first CLOS; and
cause only data belonging to the first application that remains in the cache resources previously allocated to the first CLOS to be flushed such that all cache resources allocated to the fourth CLOS no longer include any data that belongs to the first application,
wherein to cause the data belonging to the first application to be flushed comprises the system to:
isolate the cache resources previously allocated to the first CLOS such that the second application does not have access to the isolated cache resources allocated to the fourth CLOS;
overwrite all data in the isolated cache resources;
cause all the data in the isolated cache resources to be flushed; and

remove the isolation of the cache resources to allow the second application to have access to all cache resources allocated to the fourth CLOS.

15. The at least one non-transitory machine readable medium of claim 14 , comprising the allocated cache resources allocated from an n-way set associative last level cache (LLC) for the processor, where “n” is any whole, positive number greater than 1.

16. The at least one non-transitory machine readable medium of claim 14 , further comprising the instructions to cause the system to:
cause all data in the isolated cache resources to be overwritten with random values before all the data in the isolated cache resources is caused to be flushed.

17. The at least one non-transitory machine readable medium of claim 14 , comprising the instructions to further cause the system to:
send a cache line flush (CLFLUSH)/CLFLUSH operation (CLFLUSHOPT) instruction to the processor to cause all the data in the isolated cache resources to be flushed.

18. The at least one non-transitory machine readable medium of claim 14 , the first application comprising a virtual ne

Assignees

• Intel Corp

Inventors

• Kantecki Tomasz
• Browne John
• Macnamara Chris
• Verrall Timothy
• Cornu Marcel
• Walsh Eoin
• Herdrich Andrew J

Classifications

• G06F9/45558 Primary

  Hypervisor-specific management and integration aspects · CPC title

• G06F12/0891 Primary

  using clearing, invalidating or resetting means · CPC title

• G06F9/5016

  the resource being the memory · CPC title

• G06F12/0804

  with main memory updating (G06F12/0806 takes precedence) · CPC title

• G06F12/0897

  with two or more cache hierarchy levels (with multilevel cache hierarchies G06F12/0811) · CPC title