Method of feeding electronic components and electronic component feeder

US10752391B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10752391-B2
Application numberUS-201916715936-A
CountryUS
Kind codeB2
Filing dateDec 16, 2019
Priority dateDec 7, 2016
Publication dateAug 25, 2020
Grant dateAug 25, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method and an apparatus for feeding electronic components are capable of increasing a rate of filling accommodation holes with electronic components. An accommodation plate including accommodation holes, respective openings of which are distributed over a main surface of the accommodation plate, is prepared, and electronic components are loaded onto the main surface of the accommodation plate. A horizontal vibration in an X-axis direction and/or a Y-axis direction and a vertical vibration in a Z-axis direction are applied to the accommodation plate with the main surface of the accommodation plate level. The horizontal and vertical vibrations have an equal number of vibrations and a prescribed phase difference therebetween. The accommodation plate is vibrated so that each of the electronic components is fed into one of the accommodation holes while moving over the main surface of the accommodation plate.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of feeding electronic components, the method comprising: preparing an accommodation plate including a plurality of accommodation holes, respective openings of the plurality of accommodation holes being distributed over a main surface of the accommodation plate; loading a plurality of electronic components onto the main surface of the accommodation plate; and applying a horizontal vibration in at least one of an X-axis direction and a Y-axis direction and a vertical vibration in a Z-axis direction to the accommodation plate while maintaining the main surface level, where the X-axis direction and the Y-axis direction are orthogonal or substantially orthogonal to each other on a horizontal plane and the Z-axis direction is orthogonal or substantially orthogonal to both of the X-axis direction and the Y-axis direction; wherein the applying of the vibrations to the accommodation plate includes: moving the plurality of electronic components over the main surface of the accommodation plate; and feeding each of the plurality of electronic components into a corresponding one of the plurality of accommodation holes while moving the plurality of electronic components over the main surface of the accommodation plate; the horizontal vibration and the vertical vibration have an equal or substantially equal number of vibrations and have a prescribed phase difference therebetween; and in the feeding of each of the plurality of electronic components into a corresponding one of the plurality of accommodation holes, at least two of the electronic components are to be fed into one of the accommodation holes. 2. The method according to claim 1 , wherein the number of vibrations of the horizontal vibration and the vertical vibration is about 50 Hz or more. 3. The method according to claim 1 , wherein the applying of the vibrations to the accommodation plate includes adjusting the phase difference between the horizontal vibration and the vertical vibration. 4. The method according to claim 3 , wherein the adjusting of the phase difference includes reversing the phase difference to be plus or minus. 5. The method according to claim 1 , wherein each of the electronic components has a rectangular or substantially rectangular parallelepiped shape defined by a length dimension, a width dimension, and a thickness dimension measured in a length direction, a width direction, and a thickness direction orthogonal or substantially orthogonal to each other, respectively, and the length dimension is largest among the length dimension, the width dimension, and the thickness dimension. 6. The method according to claim 5 , wherein a depth dimension of each of the accommodation holes is equal or substantially equal to the length dimension, and an opening of each of the accommodation holes is selected so as not to accommodate the length dimension and so as to accommodate the width dimension and the thickness dimension. 7. The method according to claim 1 , wherein in the feeding of each of the plurality of electronic components into a corresponding one of the plurality of accommodation holes, an irregular state in which some of the electronic components are fed into one of the accommodation holes or the electronic components are fed into the accommodation holes in an orientation other than a regular orientation is caused; and the applying of the vibrations to the accommodation plate includes further increasing an amplitude of at least the vertical vibration to resolve the irregular state. 8. The method according to claim 1 , wherein the applying of the vibrations to the accommodation plate further includes, after the feeding of each of the plurality of electronic components into a corresponding one of the plurality of accommodation holes: finding the accommodation holes yet to be filled, into which the electronic components have not been fed; and moving the electronic components which have not been fed into the accommodation holes and remain on the main surface of the accommodation plate toward the accommodation holes yet to be filled. 9. The method according to claim 1 , wherein in the loading of the plurality of electronic components onto the main surface of the accommodation plate, a larger number of the electronic components than the accommodation holes are loaded. 10. The method according to claim 1 , wherein the one accommodation hole has a longitudinal opening which allows some of the electronic components to be fed thereinto in a column. 11. The method according to claim 1 , further comprising removing the accommodation plate with some of the accommodation holes filled with the electronic components. 12. The method according to claim 11 , wherein the preparing of the accommodation plate includes preparing a plurality of the accommodation plates; the feeding of each of the plurality of electronic components into a corresponding one of the plurality of accommodation holes is performed with a plurality of the main surfaces of the plurality of accommodation plates being flush with each other; and the removing of the accommodation plate includes removing the plurality of accommodation plates at different points in time. 13. An electronic component feeder that performs a method of feeding electronic components according to claim 1 . 14. The electronic component feeder according to claim 13 , wherein the number of vibrations of the horizontal vibration and the vertical vibration is about 50 Hz or more.

Assignees

Inventors

Classifications

  • Trays for chips · CPC title

  • Vibratory movement · CPC title

  • arranging or orientating the articles by mechanical or pneumatic means during feeding (during transit by conveyor B65G47/24, B65G47/26) · CPC title

  • Introducing successive articles, e.g. confectionery products, of different shape or size in predetermined positions · CPC title

  • Loading or unloading of containers (H05K13/028 takes precedence) · CPC title

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What does patent US10752391B2 cover?
A method and an apparatus for feeding electronic components are capable of increasing a rate of filling accommodation holes with electronic components. An accommodation plate including accommodation holes, respective openings of which are distributed over a main surface of the accommodation plate, is prepared, and electronic components are loaded onto the main surface of the accommodation plate…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification B65G47/1421. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Aug 25 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).