Broadband stacked patch radiating elements and related phased array antennas

US10741920B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10741920-B2
Application numberUS-201816163601-A
CountryUS
Kind codeB2
Filing dateOct 18, 2018
Priority dateOct 18, 2017
Publication dateAug 11, 2020
Grant dateAug 11, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A stacked patch radiating element includes a dielectric substrate, a ground plane on a first surface of the dielectric substrate, a patch radiator on a second surface of the dielectric substrate, a feed that is configured to connect the patch radiator to a transmission line, a solder layer on the patch radiator opposite the dielectric substrate, and a parasitic radiating element on the solder layer opposite the patch radiator. The parasitic radiating element includes a metal layer on the solder, a parasitic radiator dielectric substrate on the first metal layer opposite the solder, and a parasitic radiator on the parasitic radiator dielectric substrate opposite the first metal layer.

First claim

Opening claim text (preview).

That which is claimed is: 1. A stacked patch radiating element, comprising: a dielectric substrate having first and second opposed surfaces; a ground plane on the first surface of the dielectric substrate; a patch radiator on the second surface of the dielectric substrate; a feed that is configured to connect the patch radiator to a transmission line; a solder layer on the patch radiator opposite the dielectric substrate; and a parasitic radiating element on the solder layer opposite the patch radiator, the parasitic radiating element including: a metal layer on the solder; a parasitic radiator dielectric substrate on the first metal layer opposite the solder; and a parasitic radiator on the parasitic radiator dielectric substrate opposite the first metal layer. 2. The stacked patch radiating element of claim 1 , wherein a footprint of the parasitic radiator is smaller than a footprint of the patch radiator. 3. The stacked patch radiating element of claim 1 , wherein a center of the parasitic radiator is substantially aligned with a center of the patch radiator. 4. The stacked patch radiating element of claim 1 , wherein the solder layer directly contacts both the patch radiator and the metal layer. 5. The stacked patch radiating element of claim 1 , wherein the patch radiator is an inset patch radiator that includes an inset on one side, and wherein the transmission line connects to an interior portion of the patch radiator exposed through the inset. 6. The stacked patch radiating element of claim 5 , wherein the metal layer includes an inset on one side, wherein the inset in the metal layer is substantially aligned with the inset in the patch radiator. 7. The stacked patch radiating element of claim 6 , wherein the parasitic radiator does not include an inset in any side thereof. 8. The stacked patch radiating element of claim 1 , wherein a footprint of the metal layer has substantially the same shape as a footprint of the patch radiator. 9. The stacked patch radiating element of claim 8 , wherein a footprint of the parasitic radiator is different than a footprint of the metal layer. 10. The stacked patch radiating element of claim 1 , wherein a first opening extends through the dielectric substrate and a second opening extends through the ground plane layer and connects to the first opening, the first and second openings being underneath the patch radiator. 11. The stacked patch radiating element of claim 1 , further comprising a dielectric cover on the parasitic radiator opposite the parasitic radiator dielectric substrate. 12. The stacked patch radiating element of claim 11 , wherein the dielectric cover is attached to the parasitic radiator via an adhesive layer. 13. The stacked patch radiating element of claim 1 , wherein a first coefficient of thermal expansion of the parasitic radiator dielectric substrate differs from a second coefficient of thermal expansion of the dielectric substrate by at least 100%. 14. An active antenna array, comprising: a base board that includes: a dielectric substrate having first and second opposed surfaces; a ground plane on the first surface of the dielectric substrate; a plurality of patch radiators on the second surface of the dielectric substrate; and a plurality of feeds, each feed configured to connect a respective one of the patch radiators to one of a plurality of transmission lines of a feed network; a solder mask having a plurality of openings on the second surface of the dielectric substrate; solder within the openings in the solder mask; and a plurality of parasitic radiating elements on the solder, each parasitic radiating element including: a parasitic radiator dielectric substrate having a first surface and a second surface opposite the first surface; a conductive solder contact layer on the first surface of the parasitic radiator dielectric substrate; and a parasitic radiator on the second surface of the parasitic radiator dielectric substrate. 15. The active antenna array of claim 14 , wherein for each parasitic radiating element, a footprint of the parasitic radiator is different than a footprint of the conductive solder contact layer. 16. The active antenna array of claim 14 , wherein for each parasitic radiator, a footprint of the conductive solder contact layer has substantially the same shape as a footprint of the patch radiator on which the parasitic radiating element is mounted. 17. The active antenna array of claim 14 , wherein a first coefficient of thermal expansion of each parasitic radiator dielectric substrate differs from a second coefficient of thermal expansion of the dielectric substrate by at least 100%. 18. The active antenna array of claim 14 , further comprising a plurality of dummy stacked patch radiating elements, each dummy stacked patch radiating element being substantially identical to an adjacent stacked patch radiating element except that a patch radiator of each dummy stacked patch radiating element is not connected to the feed network. 19. The stacked patch radiating element of claim 1 , wherein the dielectric substrate includes at least one vent hole underneath the patch radiator, and the ground plane includes an opening that is in fluid communication with the vent hole. 20. The stacked patch radiating element of claim 19 , wherein the vent hole is not plated with metal.

Assignees

Inventors

Classifications

  • Apparatus or processes specially adapted for manufacturing antenna arrays (manufacturing waveguides H01P11/00) · CPC title

  • Patch antenna array · CPC title

  • Feeding or matching arrangements for broad-band or multi-band operation · CPC title

  • H01Q9/0414Primary

    in a stacked or folded configuration · CPC title

  • using two feed points · CPC title

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What does patent US10741920B2 cover?
A stacked patch radiating element includes a dielectric substrate, a ground plane on a first surface of the dielectric substrate, a patch radiator on a second surface of the dielectric substrate, a feed that is configured to connect the patch radiator to a transmission line, a solder layer on the patch radiator opposite the dielectric substrate, and a parasitic radiating element on the solder l…
Who is the assignee on this patent?
Commscope Technologies Llc
What technology area does this patent fall under?
Primary CPC classification H01Q9/0414. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 11 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).