Metallic interconnect, a method of manufacturing a metallic interconnect, a semiconductor arrangement and a method of manufacturing a semiconductor arrangement

Patent metadata

Field	Value
Publication number	US-10734352-B2
Application number	US-201816148316-A
Country	US
Kind code	B2
Filing date	Oct 1, 2018
Priority date	Oct 2, 2017
Publication date	Aug 4, 2020
Grant date	Aug 4, 2020

Abstract

A metallic interconnection and a semiconductor arrangement including the same are described, wherein a method of manufacturing the same may include: providing a first structure including a first metallic layer having protruding first microstructures; providing a second structure including a second metallic layer having protruding second microstructures; contacting the first and second microstructures to form a mechanical connection between the structures, the mechanical connection being configured to allow fluid penetration; removing one or more non-metallic compounds on the first metallic layer and the second metallic layer with a reducing agent that penetrates the mechanical connection and reacts with the one or more non-metallic compounds; and heating the first metallic layer and the second metallic layer at a temperature causing interdiffusion of the first metallic layer and the second metallic layer to form the metallic interconnection between the structures.

First claim

What is claimed is:

1. A method of forming a metallic interconnection between a first structure and a second structure, the method comprising:
providing the first structure with a first metallic layer having first microstructures protruding from the first metallic layer;
providing the second structure with a second metallic layer having second microstructures protruding from the second metallic layer;
contacting the first microstructures and the second microstructures to form a mechanical connection between the first structure and the second structure, the mechanical connection being configured to allow fluid to penetrate the mechanical connection;
removing one or more non-metallic compounds on the first metallic layer and the second metallic layer with a reducing agent that penetrates the mechanical connection and reacts with the one or more non-metallic compounds; and
heating the first metallic layer and the second metallic layer at a temperature causing interdiffusion of the first metallic layer and the second metallic layer to form the metallic interconnection between the first structure and the second structure.

2. The method of claim 1 , wherein the one or more non-metallic compounds are barriers to interdiffusion of the first metallic layer and/or the second metallic layer.

3. The method of claim 1 , wherein the heating removes one or more organic materials from the first metallic layer and/or the second metallic layer.

4. The method of claim 1 , wherein the first microstructures have a greater length than width and the second microstructures have a greater length than width.

5. The method of claim 1 , wherein a length of respective ones of the microstructures is between 5-60 μm and a width of the respective ones of the microstructures is between 100 nm and 2 μm.

6. The method of claim 1 , wherein the reducing agent comprises hydrogen.

7. The method of claim 1 , wherein the reducing agent comprises formic acid.

8. The method of claim 1 , wherein the reducing agent is a plasma.

9. The method of claim 1 , wherein the reducing agent decomposes at the temperature to comprise radical hydrogen.

10. The method of claim 1 , herein the heating occurs free from applied mechanical load on the first metallic layer and the second metallic layer.

11. The method of claim 1 , wherein the metallic interconnection has a higher porosity than the first metallic layer and the second metallic layer.

12. The method of claim 1 , wherein the metallic interconnection comprises a region including one or more gaps between contacted first microstructures and second microstructures.

13. The method of claim 1 , wherein a metal of the first metallic layer and a metal of the second metallic layer are the same.

14. The method of claim 1 , wherein the metallic interconnection comprises a substantially pure metal.

15. The method of claim 1 , wherein the metallic interconnection comprises a metal alloy between the first metallic layer and the second metallic layer, and wherein the metal alloy comprises a metal of the first metallic layer and a metal of the second metallic layer.

16. The method of claim 1 , wherein the temperature is an annealing temperature of a metal of the first metallic layer and/or a metal of the second metallic layer.

17. The method of claim 1 , wherein the temperature is below 350° C.

18. The method of claim 1 , wherein removing the one or more non-metallic compounds is performed substantially free of an oxidizing agent of a metal of the first metallic layer and a metal of the second metallic layer.

19. A method of manufacturing a semiconductor arrangement, the method comprising:
forming a first metallic layer on the semiconductor device, the first metallic layer comprising first microstructures protruding from the first metallic layer, the first metallic layer and the first microstructures being at least partially covered by a first metal-oxide and one or more organic materials;
providing a substrate comprising a second metallic layer having second microstructures protruding from the second metallic layer, the second metallic layer and the second protruding structures being at least partially covered by a second metal-oxide and the one or more organic materials;
contacting the first microstructures and the second microstructures to form a mechanical connection between the semiconductor device and the substrate, the mechanical connection being configured to allow fluid to penetrate the mechanical connection;
removing the first metal-oxide and the second metal-oxide with a reducing agent that penetrates the mechanical connection and reacts with the first metal-oxide and the second metal-oxide; and
heating the first metallic layer and the second metallic layer at a temperature causing interdiffusion of the first metallic layer and the second metallic layer to form a metallic interconnection between the semiconductor device and the substrate as well as removal of the one or more organic materials.

20. The method of claim 19 , wherein the metallic interconnection has a higher porosity than the first metallic layer and the second metallic layer.

21. The method of claim 20 , wherein the higher porosity is configured to decouple stress between the first structure and the second structure.

Assignees

• Infineon Technologies Ag

Inventors

• Escher-Poeppel Irmgard
• Hosseini Khalil
• Lodermeyer Johannes
• Mahler Joachim
• Meyer Thorsten
• Meyer-Berg Georg
• Nikitin Ivan
• Pufall Reinhard
• Riedl Edmund
• Schmidt Klaus
• Schneegans Manfred
• Schwarz Patrick

Classifications

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W72/07354

  changes in dispositions · CPC title

• H10W72/07353

  changes in shapes · CPC title