Semiconductor device having a reduced surface doping in an edge termination area, and method for manufacturing thereof

Patent metadata

Field	Value
Publication number	US-10727331-B2
Application number	US-201816023433-A
Country	US
Kind code	B2
Filing date	Jun 29, 2018
Priority date	Jun 30, 2017
Publication date	Jul 28, 2020
Grant date	Jul 28, 2020

Abstract

A semiconductor device includes a semiconductor substrate having drift and body regions. The drift region includes upper and lower drift regions. An active area includes a plurality of spicular trenches extending through the body region and into the drift region. Each spicular trench in the active area has a lower end which together define a lower end of the upper drift region extending towards a first side and a lower drift region extending from the lower end of the upper drift region towards a second side. The edge termination area includes spicular termination trenches extending at least into the upper drift region. A surface doping region arranged in the upper drift region in the edge termination area extends to the first side, is spaced apart from the lower end of the upper drift region, and has a net doping concentration lower than that of the upper drift region.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a semiconductor substrate having a first side, a second side opposite to the first side, a lateral rim, an active area, an edge termination area arranged between the active area and the lateral rim of the semiconductor substrate, a drift region of a first conductivity type and a body region of a second conductivity type, the drift region comprising an upper drift region and a lower drift region,
wherein the active area comprises at least portions of the body region and a plurality of spicular trenches each comprising a field electrode and extending from the first side through the body region and into the drift region, each of the spicular trenches in the active area comprising a lower end, the lower ends together defining a lower end of the upper drift region extending towards the first side, the lower drift region extending from the lower end of the upper drift region towards the second side,
wherein the edge termination area comprises a plurality of termination trenches extending from the first side at least into the upper drift region,
wherein the drift region has a surface doping region arranged in the upper drift region in the edge termination area and extending to the first side,
wherein the surface doping region is spaced apart from the lower end of the upper drift region and has a net doping concentration lower than a net doping concentration of the upper drift region,
wherein the surface doping region has a net conductivity type of the first conductivity type,
wherein the surface doping region laterally completely extends from an outer end of the active area to the lateral rim of the semiconductor substrate.

2. The semiconductor device of claim 1 , wherein the plurality of termination trenches comprises a plurality of spicular trenches in the edge termination area extending from the first side into the upper drift region.

3. The semiconductor device of claim 1 , wherein the net doping concentration of the upper drift region is at least 1·10 15 /cm 3 .

4. The semiconductor device of claim 1 , wherein the net doping concentration of the surface doping region is equal to or lower than 80% of the net doping concentration of the upper drift region.

5. The semiconductor device of claim 1 , wherein the drift region extends in the edge termination area to the first side.

6. The semiconductor device of claim 1 , further comprising gate trenches in the active area adjacent to respective spicular trenches, the gate trenches extending from the first side through the body region, wherein each of the gate trenches comprises a gate electrode electrically insulated from the adjacent body region, wherein the spicular trenches extends deeper into the semiconductor substrate than the gate trenches.

7. The semiconductor device of claim 6 , wherein at least some of the spicular trenches in the active area are at least partially laterally surrounded by a respective gate trench.

8. The semiconductor device of claim 1 , further comprising at least one of a gate runner and a source runner arranged in the edge termination area.

9. The semiconductor device of claim 1 , wherein the spicular trenches are arranged in a staggered pattern.

10. A semiconductor device, comprising:
a semiconductor substrate having a first side, a second side opposite to the first side, a lateral rim, an active area, an edge termination area arranged between the active area and the lateral rim of the semiconductor substrate, a drift region of a first conductivity type and a body region of a second conductivity type, the drift region comprising an upper drift region and a lower drift region; and
counter dopants disposed in the upper drift region in the edge termination area, the counter dopants having an opposite conductivity type as the drift region and reducing a net doping concentration of the upper drift region at the first side of the semiconductor substrate to form a surface doping region in the edge termination area, the surface doping region having a net conductivity type of the first conductivity type,
wherein the active area comprises at least portions of the body region and a plurality of spicular trenches each comprising a field electrode and extending from the first side through the body region and into the drift region, each of the spicular trenches in the active area comprising a lower end, the lower ends together defining a lower end of the upper drift region extending towards the first side, the lower drift region extending from the lower end of the upper drift region towards the second side,
wherein the edge termination area comprises a plurality of spicular termination trenches extending from the first side at least into the upper drift region,
wherein the surface doping region is spaced apart from the lower end of the upper drift region,
wherein the surface doping region laterally completely extends from an outer end of the active area to the lateral rim of the semiconductor substrate.

11. A semiconductor device, comprising:
a semiconductor substrate having a first side, a second side opposite to the first side, a lateral rim, an active area, an edge termination area arranged between the active area and the lateral rim of the semiconductor substrate, a drift region of a first conductivity type and a body region of a second conductivity type, the drift region comprising an upper drift region and a lower drift region,
wherein the active area comprises at least portions of the body region and a plurality of spicular trenches each comprising a field electrode and extending from the first side through the body region and into the drift region, each of the spicular trenches in the active area comprising a lower end, the lower ends together defining a lower end of the upper drift region extending towards the first side, the lower drift region extending from the lower end of the upper drift region towards the second side,
wherein the edge termination area comprises a plurality of termination trenches extending from the first side at least into the upper drift region,
wherein the drift region has a surface doping region arranged in the upper drift region in the edge termination area and extending to the first side,
wherein the surface doping region is spaced apart from the lower end of the upper drift region and has a net doping concentration lower than a net doping concentration of the upper drift region,
wherein the surface doping region has a net conductivity type of the first conductivity type,
wherein the surface doping region is only formed in an outer part of the edge termination
area extending to the lateral rim, wherein the upper drift region extends to the first side in an inner part of the edge termination area next to the active area.

12. A semiconductor device, comprising:
a semiconductor substrate having a first side, a second side opposite to the first side, a lateral rim, an active area, an edge termination area arranged between the active area and the lateral rim of the semiconductor substrate, a drift region of a first conductivity type and a body region of a second conductivity type, the drift region comprising an upper drift region and a lower drift region; and
counter dopants disposed in the upper drift region in the edge termination area, the counter dopants having an opposite conductivity type as the drift region and reducing a net doping concentration of the upper drift region at the first side of the semiconductor substrate to form a surface doping region in the edge termination area, the surface doping region having a net conductivity type of the first conductivity type,
wherein the active area comprises at leas

Assignees

• Infineon Technologies Austria Ag

Inventors

• Ouvrard Cedric
• Amali Adam
• Blank Oliver
• Hutzler Michael
• Laforet David
• Naik Harsh
• Siemieniec Ralf
• Yip Li Juin

Classifications

• H10D62/393

  Body regions of DMOS transistors or IGBTs  (cell layout of DMOS H10D62/127) · CPC title

• H10D64/117 Primary

  Recessed field plates, e.g. trench field plates or buried field plates · CPC title

• H10D62/127

  of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs · CPC title

• H10D62/106

  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions · CPC title

• H10D62/105

  by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  (IGFETs having LDD or drain extension regions H10D30/601) · CPC title