Light emitting diode and method of fabricating the same

Patent metadata

Field	Value
Publication number	US-10720550-B2
Application number	US-201816138985-A
Country	US
Kind code	B2
Filing date	Sep 22, 2018
Priority date	Dec 22, 2016
Publication date	Jul 21, 2020
Grant date	Jul 21, 2020

Abstract

A method of fabricating an LED includes: providing an epitaxial structure having a growth substrate, a first-type semiconductor layer, an active layer and a second-type semiconductor layer; forming an extended electrode and performing thermal treatment to form ohmic contact with the second-type semiconductor layer; providing a temporary substrate bonded with the epitaxial structure, and removing the growth substrate to expose the surface of the first-type semiconductor layer; forming an ohmic contact layer, a mirror layer and a bonding layer over the exposed surface of the first-type semiconductor layer; providing a conductive substrate bonded with the bonding layer, and removing the temporary substrate to expose part of the surface of the second-type semiconductor layer and the extended electrode; forming a roughening surface via etching of the exposed second-type semiconductor layer; and providing a bonding wire electrode forming a closed loop with the extended electrode.

First claim

The invention claimed is:

1. A fabrication method of a light-emitting diode, the method comprising:
(1) providing an epitaxial structure including a growth substrate, a first-type semiconductor layer, an active layer and a second-type semiconductor layer;
(2) forming an extended electrode over a surface of the second-type semiconductor layer and performing thermal treatment to form ohmic contact with the second-type semiconductor layer;
(3) providing a temporary substrate bonded with the epitaxial structure, and removing the growth substrate to expose a surface of the first-type semiconductor layer;
(4) forming an ohmic contact layer, a mirror layer and a bonding layer over the exposed surface of the first-type semiconductor layer;
(5) providing a conductive substrate bonded with the bonding layer, and removing the temporary substrate to expose a portion of the surface of the second-type semiconductor layer and the extended electrode;
(6) forming a roughening surface via etching of the exposed second-type semiconductor layer; and
(7) forming a bonding pad electrode over the surface of the second-type semiconductor layer,
wherein the bonding pad electrode forms a closed loop with the extended electrode;
wherein the extended electrode is formed prior to the forming the roughening surface via etching in step (6), and the bonding pad electrode is formed after the roughening surface via etching in step (6), to thereby avoid forming a magnetic field resulting from the closed loop causing charged particles in a roughening solution to drift during the roughening.

2. The fabrication method of claim 1 , wherein:
a metal mask layer is formed above or below the extended electrode in step (2);
area of the metal mask layer is larger than that of the extended electrode.

3. The fabrication method of claim 2 , wherein a thickness of the metal mask layer formed in step (2) is 10-200 nm.

4. The fabrication method of claim 2 , wherein an edge of the metal mask layer formed in step (2) extends beyond an edge of the extended electrode by at least 2 μm.

5. The fabrication method of claim 2 , wherein the metal mask layer formed in step (2) is composed of at least one of Au, Cr, Ni, Ti, or Pd.

6. The fabrication method of claim 1 , wherein a thermal treatment temperature in step (2) is above 300° C.

7. The fabrication method of claim 1 , wherein the extended electrode is directly formed as a mask layer in step (6) for the roughening etching of the surface of the second-type semiconductor layer.

8. The fabrication method of claim 1 , wherein a mask layer of photoresist layer is formed in a bonding pad electrode area in step (6) prior to the etching.

9. The fabrication method of claim 1 , wherein:
an insulating layer is formed as a mask layer in a bonding pad electrode area prior to the etching in step (6); and
the bonding pad electrode is directly formed over the insulating layer in step (7).

10. The fabrication method of claim 1 , wherein the etching is chemical etching.

Assignees

• Xiamen Sanan Optoelectronics Technology Co Ltd

Inventors

• Meng Cheng
• Wu Chun-Yi
• Yang Shufan
• Wang Duxiang

Classifications

• H10H20/824

  comprising only Group III-V materials, e.g. GaP · CPC title

• H10H20/0364

  of interconnections · CPC title

• H10H20/0363

  of optical field-shaping means · CPC title

• H10H20/84

  Coatings, e.g. passivation layers or antireflective coatings · CPC title

• H10H20/032

  of electrodes · CPC title