Apparatus and methods for providing a reconfigurable bidirectional front-end interface

Patent metadata

Field	Value
Publication number	US-10719476-B2
Application number	US-201816058251-A
Country	US
Kind code	B2
Filing date	Aug 8, 2018
Priority date	May 13, 2015
Publication date	Jul 21, 2020
Grant date	Jul 21, 2020

Abstract

An apparatus and methods are disclosed for a bidirectional front-end circuit included within a system on chip (SoC). The bidirectional front-end circuit includes a differential bidirectional terminal for receiving and transmitting signals. The bidirectional front-end circuit is configured to provide a first communication path between a first controller and a connector through the differential bidirectional terminal when operating in a first mode. And, the bidirectional front-end circuit is reconfigured to provide a second communication path between a second controller and the connector through the differential bidirectional terminal when operating in a second mode.

First claim

What is claimed is:

1. A method comprising:
providing a first and a second physical layer (PHY) within a system on chip (SoC), the first PHY including first and second lines and the second PHY including third and fourth lines;
operating in a first mode, wherein operating in the first mode includes configuring the first line of the first PHY and the third line of the second PHY to transmit signals and configuring the second line of the first PHY and the fourth line of the second PHY to receive signals; and
operating in a second mode, wherein operating in the second mode includes either reconfiguring the first line of the first PHY and the third line of the second PHY to receive signals or reconfiguring the second line of the first PHY and the fourth line of the second PHY to transmit signals, wherein configuring or reconfiguring any one of the first line, the second line, the third line, or the fourth line to receive signals includes causing a pair of inverters to activate a first path from a differential bidirectional terminal to ground through a terminating impedance, and wherein configuring or reconfiguring any one of the first line, the second line, the third line, or the fourth line to transmit signals includes causing a first inverter of the pair of inverters to activate a second path between the differential bidirectional terminal and voltage drain drain (Vdd).

2. The method of claim 1 , wherein operating in the second mode includes reconfiguring the second line of the first PHY to transmit signals, and reconfiguring the fourth line of the second PHY to transmit signals, such that the first, second, third, and fourth lines are all configured to transmit signals.

3. The method of claim 1 , wherein operating in the second mode includes reconfiguring the first line of the first PHY to receive signals, and reconfiguring the third line of the second PHY to receive signals, such that the first, second, third, and fourth lines are all configured to receive signals.

4. The method of claim 2 , wherein reconfiguring the second line of the first PHY to transmit signals includes utilizing a second bidirectional lane front-end circuit to electrically couple a video controller to a second differential bidirectional terminal coupled to the second line of the first PHY, and
wherein reconfiguring the fourth line of the second PHY to transmit signals includes utilizing a fourth bidirectional lane front-end circuit to electrically couple the video controller to a fourth differential bidirectional terminal coupled to the fourth line of the second PHY.

5. The method of claim 3 , wherein reconfiguring the first line of the first PHY to receive signals includes utilizing a first bidirectional lane front-end circuit to electrically couple a video controller to a first differential bidirectional terminal coupled to the first line of the first PHY, and
wherein reconfiguring the third line of the second PHY to receive signals includes utilizing a third bidirectional lane front-end circuit to electrically connect the video controller to a third differential bidirectional terminal coupled to the third line of the second PHY.

6. The method of claim 1 , wherein the first mode is USB mode and the second mode is Display Port mode.

7. The method of claim 6 , wherein, when operating in the first mode, configuring the first line and the third line to transmit signals includes utilizing a first and a third bidirectional lane front-end circuit, respectively, to electrically couple a USB controller to the first line and the third line, and
wherein, when operating in the first mode, configuring the second line and the fourth line to receive signals includes utilizing a second and a fourth bidirectional lane front-end circuit, respectively, to electrically couple the USB controller to the second line and the fourth line.

8. A method performed in a system on chip (SoC) having a first physical layer (PHY) and a second PHY, the method comprising:
operating the first PHY and the second PHY in a first mode; and
dynamically reconfiguring the first PHY and the second PHY to operate in a second mode that is different from the first mode;
wherein operating in the first mode includes configuring a first line of the first PHY and a third line of the second PHY to transmit signals and configuring a second line of the first PHY and a fourth line of the second PHY to receive signals; and
wherein operating in the second mode includes either reconfiguring the first line of the first PHY and the third line of the second PHY to receive signals or reconfiguring the second line of the first PHY and the fourth line of the second PHY to transmit signals, wherein configuring or reconfiguring any one of the first line, the second line, the third line, or the fourth line to receive signals includes causing a pair of inverters to activate a first path from a differential bidirectional terminal to ground through a terminating impedance, and wherein configuring or reconfiguring any one of the first line, the second line, the third line, or the fourth line to transmit signals includes causing a first inverter of the pair of inverters to activate a second path between the differential bidirectional terminal and voltage drain drain (Vdd).

9. The method of claim 8 , wherein operating in the second mode includes reconfiguring the second line of the first PHY to transmit signals, and reconfiguring the fourth line of the second PHY to transmit signals, such that the first, second, third, and fourth lines are all configured to transmit signals.

10. The method of claim 9 , wherein reconfiguring the second line of the first PHY to transmit signals includes utilizing a second bidirectional lane front-end circuit to electrically couple a video controller to a second differential bidirectional terminal coupled to the second line of the first PHY, and
wherein reconfiguring the fourth line of the second PHY to transmit signals includes utilizing a fourth bidirectional lane front-end circuit to electrically couple the video controller to a fourth differential bidirectional terminal coupled to the fourth line of the second PHY.

11. The method of claim 8 , wherein operating in the second mode includes reconfiguring the first line of the first PHY to receive signals, and reconfiguring the third line of the second PHY to receive signals, such that the first, second, third, and fourth lines are all configured to receive signals.

12. The method of claim 11 , wherein reconfiguring the first line of the first PHY to receive signals includes utilizing a first bidirectional lane front-end circuit to electrically couple a video controller to a first differential bidirectional terminal coupled to the first line of the first PHY, and
wherein reconfiguring the third line of the second PHY to receive signals includes utilizing a third bidirectional lane front-end circuit to electrically connect the video controller to a third differential bidirectional terminal coupled to the third line of the second PHY.

13. The method of claim 8 , wherein the first mode is USB mode and the second mode is Display Port mode.

14. The method of claim 13 , wherein, when operating in the first mode, configuring the first line and the third line to transmit signals includes utilizing a first and a third bidirectional lane front-end circuit, respectively, to electrically couple a USB controller to the first line and the third line, and
wherein, when operating in the first mode, configuring the second line and the fourth line to receive signals includes utilizing a second and a fourth bidirectional lane front-end circuit, respectively, to electrically

Assignees

• Qualcomm Inc

Inventors

• Zhu Zhi
• Kong Xiaohua
• Gerber Nir
• Wiesner Christian Josef

Classifications

• G06F13/387 Primary

  for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system · CPC title

• G06F13/4022

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• G06F13/4282 Primary

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

• G06F13/4072

  Drivers or receivers (G06F13/4086 takes precedence; for multistate logic circuits H03K19/0002) · CPC title

• G06F13/36

  for access to common bus or bus system · CPC title