Light-emitting device and manufacturing method thereof

US10714657B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10714657-B2
Application numberUS-201816051842-A
CountryUS
Kind codeB2
Filing dateAug 1, 2018
Priority dateApr 20, 2015
Publication dateJul 14, 2020
Grant dateJul 14, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A light-emitting device includes a substrate having a top surface, wherein the top surface includes a first portion and a second portion; a first semiconductor stack including a first upper surface and a first side wall, wherein the first semiconductor stack is on the first portion; a second semiconductor stack including a second upper surface and a second side wall, wherein the second semiconductor stack is on the first upper surface, and wherein the second side wall is devoid of connecting the first side wall; a plurality of first concavo-convex structures on the first portion; and a plurality of second concavo-convex structures on the second portion; wherein the first side wall and the second portion of the top surface form an acute angle α between thereof; and wherein the second concavo-convex structures have smaller size than that of the first concavo-convex structures.

First claim

Opening claim text (preview).

What is claimed is: 1. A light-emitting device, comprising: a substrate having a top surface, wherein the top surface comprises a first portion and a second portion; a first semiconductor stack comprising a first upper surface and a first side wall, wherein the first semiconductor stack is on the first portion; a second semiconductor stack comprising a second upper surface and a second side wall, wherein the second semiconductor stack is on the first upper surface, and wherein the second side wall is devoid of connecting the first side wall; a plurality of first concavo-convex structures on the first portion; and a plurality of second concavo-convex structures on the second portion and not covered by the first semiconductor stack; wherein the first side wall and the second portion of the top surface form an acute angle α between thereof; and wherein the second concavo-convex structures have smaller size than that of the first concavo-convex structures. 2. The light-emitting device according to claim 1 , wherein the first upper surface comprises an exposing portion between the first side wall and the second side wall, and the second side wall and the exposing portion of the first upper surface form an obtuse angle β between thereof. 3. The light-emitting device according to claim 2 , wherein 100°≤β=170°. 4. The light-emitting device according to claim 1 , wherein 30°≤α≤80°. 5. The light-emitting device according to claim 1 , wherein the second portion surrounds the first portion in a top view. 6. The light-emitting device according to claim 1 , further comprising a buffer layer between the first semiconductor stack and the top surface. 7. The light-emitting device according to claim 6 , wherein the buffer layer comprises AlN. 8. The light-emitting device according to claim 1 , wherein one of the second concavo-convex structures has a height smaller than that of one of the first concavo-convex structures. 9. The light-emitting device according to claim 1 , further comprising a first electrode on the first upper surface. 10. The light-emitting device according to claim 1 , wherein the top surface further comprises an edge, and the second portion surrounds the first portion and is between the edge and the first portion, and the narrowest distance between the first portion and the edge is between about 1 μm and about 25 μm. 11. The light-emitting device according to claim 1 , wherein the substrate comprises a side surface perpendicular to the top surface and an inclined surface formed between the top surface and the side surface. 12. The light-emitting device according to claim 11 , wherein an angle between the top surface and the inclined surface or an angle between the inclined surface and the side surface is larger than 90 degrees. 13. The light-emitting device according to claim 11 , wherein a shortest distance, between the top surface and a border between the inclined surface and the side surface, is between about 0.1 μm and 20 μm. 14. The light-emitting device according to claim 11 , wherein the inclined surface is rougher than the side surface. 15. The light-emitting device according to claim 1 , wherein the first side wall is rougher than the second side wall. 16. The light-emitting device according to claim 1 , wherein the second semiconductor stack comprises a first semiconductor layer, an active layer on the first semiconductor layer and a second semiconductor layer on the active layer. 17. The light-emitting device according to claim 16 , further comprising a dislocation stop layer between the substrate and the active layer. 18. The light-emitting device according to claim 17 , wherein an Al concentration of the dislocation stop layer is higher than 10 times an Al concentration of the first semiconductor layer or that of the first semiconductor stack. 19. The light-emitting device according to claim 17 , wherein the dislocation layer comprises Alx1Ga1-x1N, and wherein 0.05<x1<0.1. 20. The light-emitting device according to claim 1 , wherein a ration of an area of the second portion to an area of the top surface is between about 0.02 and about 0.35.

Assignees

Inventors

Classifications

  • Scattering means (H10H20/82 takes precedence) · CPC title

  • characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous · CPC title

  • having reflecting means, e.g. semiconductor Bragg reflectors · CPC title

  • Roughened surfaces, e.g. at the interface between epitaxial layers · CPC title

  • the light-emitting regions comprising nitride materials · CPC title

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What does patent US10714657B2 cover?
A light-emitting device includes a substrate having a top surface, wherein the top surface includes a first portion and a second portion; a first semiconductor stack including a first upper surface and a first side wall, wherein the first semiconductor stack is on the first portion; a second semiconductor stack including a second upper surface and a second side wall, wherein the second semicond…
Who is the assignee on this patent?
Epistar Corp
What technology area does this patent fall under?
Primary CPC classification H10H20/815. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 14 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).