Display panel and display device

Patent metadata

Field	Value
Publication number	US-10713987-B2
Application number	US-201815886839-A
Country	US
Kind code	B2
Filing date	Feb 2, 2018
Priority date	Oct 25, 2017
Publication date	Jul 14, 2020
Grant date	Jul 14, 2020

Abstract

Provided are a display panel and a display device. The display panel includes a drive chip and a switching device, and the drive chip includes a digital interface inputting terminal, a positive driving voltage inputting terminal and a negative driving voltage inputting terminal, and the switching device includes a first switching inputting terminal, a second switching inputting terminal, a third switching inputting terminal, a switching control terminal, a first switching outputting terminal corresponding to the first switching inputting terminal, a second switching outputting terminal corresponding to the second switching inputting terminal and a third switching outputting terminal corresponding to the third switching inputting terminal. The first switching inputting terminal, the second switching inputting terminal, the third switching inputting terminal and the switching control terminal are configured to be electrically connected to a main circuit board. The first switching outputting terminal is electrically connected to the digital interface inputting terminal.

First claim

What is claimed is:

1. A display panel, comprising:
a display region and a non-display region surrounding the display region;
a drive chip configured to control image display, wherein the drive chip comprises a digital interface inputting terminal, a positive driving voltage inputting terminal and a negative driving voltage inputting terminal; and
a switching device, wherein the switching device comprises a first switching inputting terminal, a second switching inputting terminal, a third switching inputting terminal, a switching control terminal, a first switching outputting terminal corresponding to the first switching inputting terminal, a second switching outputting terminal corresponding to the second switching inputting terminal and a third switching outputting terminal corresponding to the third switching inputting terminal; and wherein the first switching inputting terminal, the second switching inputting terminal, the third switching inputting terminal and the switching control terminal are configured to be electrically connected to a main circuit board, the first switching outputting terminal is electrically connected to the digital interface inputting terminal, the second switching outputting terminal is electrically connected to the positive driving voltage inputting terminal, and the third switching outputting terminal is electrically connected to the negative driving voltage inputting terminal;
wherein the switching device further comprises a first selector, a second selector and third selector;
wherein a first data inputting terminal of the first selector functions as the first switching inputting terminal, a first data inputting terminal of the second selector functions as the second switching inputting terminal, and a first data inputting terminal of the third selector functions as the third switching inputting terminal;
an outputting terminal of the first selector functions as the first switching outputting terminal, and an outputting terminal of the second selector functions as the second switching outputting terminal, an outputting terminal of the third selector functions as the third switching outputting terminal;
a control terminal of the first selector, a control terminal of the second selector and a control terminal of the third selector are electrically connected together and then function as the switching control terminal;
a second data inputting terminal of the first selector, a second data inputting terminal of the second selector, a second data inputting terminal of the third selector are electrically connected together and then electrically connected to a first voltage level outputting terminal on the main circuit board, and a ground signal is outputted from the first voltage level outputting terminal;
when the display panel is in a sleep mode, the main circuit board controls the switching device to input a ground signal to the digital interface inputting terminal, the positive driving voltage inputting terminal and the negative driving voltage inputting terminal, or the main circuit board controls the digital interface inputting terminal, the positive driving voltage inputting terminal and the negative driving voltage inputting terminal to be disconnected; and
when an image display function is performed by the display panel, the main circuit board controls the switching device to input a digital interface power signal to the digital interface inputting terminal, to input a positive driving power signal to the positive driving voltage inputting terminal and to input a negative driving power signal to the negative driving voltage inputting terminal.

2. The display panel according to claim 1 , wherein
the display panel further comprises a flexible printed circuit board (PCB) attached to the non-display region, and
the flexible PCB is electrically connected to the drive chip and the main circuit board, and the switching device is integrated on the flexible PCB.

3. The display panel according to claim 1 , wherein
the switching device further comprises a reset resistor and a reset capacitor,
wherein a first end of the reset resistor is electrically connected to a second voltage level outputting terminal on the main circuit board, a second end of the reset resistor is electrically connected to a first electrode plate of the reset capacitor and a reset terminal of the drive chip, and a second electrode plate of the reset capacitor is electrically connected to the ground.

4. The display panel according to claim 1 , wherein
the display panel further comprises a first time-delay control circuit and a second time-delay control circuit,
wherein the first time-delay control circuit and the second time-delay control circuit are configured for performing a delay processing on signals inputted thereto; and
an inputting terminal of the first time-delay control circuit is electrically connected to the second switching outputting terminal of the switching device, an outputting terminal of the first time-delay control circuit is electrically connected to the positive driving voltage inputting terminal, an inputting terminal of the second time-delay control circuit is electrically connected to the third switching outputting terminal of the switching device, and an outputting terminal of the second time-delay control circuit is electrically connected to the negative driving voltage inputting terminal.

5. The display panel according to claim 4 , wherein
the first time-delay control circuit comprises: a first resistor, a second resistor, a diode, a third resistor, a fourth resistor, a fifth resistor, a first capacitor, a second capacitor and a time-delay chip;
wherein a first end of the first resistor functions as the inputting terminal of the first time-delay control circuit, a second end of the first resistor is electrically connected to a first end of the second resistor, a second end of the second resistor is electrically connected to a cathode of the diode, and an anode of the diode is connected to the ground;
a first electrode plate of the first capacitor is electrically connected to the first end of the first resistor, a second pad of the first capacitor is electrically connected to a first electrode plate of the second capacitor, and a second electrode plate of the second capacitor is electrically connected to the cathode of the diode;
a first end of the third resistor is electrically connected to the cathode of the diode, and a second end of the third resistor is connected to the ground;
a first end of the fourth resistor is electrically connected to the first end of the first resistor, a second end of the fourth resistor is electrically connected to a first end of the fifth resistor, and a second end of the fifth resistor functions as the outputting terminal of the first time-delay control circuit;
the time-delay chip comprises a first source electrode pin, a second source electrode pin, a third source electrode pin, a gate electrode pin, a first drain electrode pin, a second drain electrode pin, a third drain electrode pin and a fourth drain electrode pin;
the first source electrode pin, the second source electrode pin and the third source electrode pin are electrically connected to the first end of the first resistor, the gate electrode pin is electrically connected to the cathode of the diode, and the first drain electrode pin, the second drain electrode pin, the third drain electrode pin and the fourth drain electrode pin are electrically connected to a second end of the fourth resistor; and
the second time-delay control circuit has a same circuit structure with the first time-delay control circuit.

6. The display panel according to claim 1 , wherein
the switching device is integrated into the drive chip.

7. The display panel according

Assignees

• Shanghai Avic Opto Electronics Co Ltd

Inventors

• Huang Zhengyuan
• Fan Shuquan
• Wang Xupeng
• Wang Shanrong
• Zheng Zhi

Classifications

• G09G2320/0247

  Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes · CPC title

• G09G2310/0291

  Details of output amplifiers or buffers arranged for use in a driving circuit · CPC title

• G09G2310/0264

  Details of driving circuits · CPC title

• G06F3/048

  Interaction techniques based on graphical user interfaces [GUI] · CPC title

• G09G3/20 Primary

  for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title