Method for manufacturing piezoelectric device

Patent metadata

Field	Value
Publication number	US-10707406-B2
Application number	US-201715473661-A
Country	US
Kind code	B2
Filing date	Mar 30, 2017
Priority date	Sep 28, 2010
Publication date	Jul 7, 2020
Grant date	Jul 7, 2020

Abstract

In a method of manufacturing a piezoelectric device, during an isolation formation step, a supporting substrate has a piezoelectric thin film formed on its front with a compressive stress film present on its back. The compressive stress film compresses the surface on a piezoelectric single crystal substrate side of the supporting substrate, and the piezoelectric thin film compresses the back of the supporting substrate, which is opposite to the surface on the piezoelectric single crystal substrate side. Thus, the compressive stress produced by the compressive stress film and that produced by the piezoelectric thin film are balanced in the supporting substrate, which causes the supporting substrate to be free of warpage and remain flat. A driving force that induces isolation in the isolation formation step is gasification of the implanted ionized element rather than the compressive stress to the isolation plane produced by the piezoelectric thin film.

First claim

What is claimed is:

1. A method for manufacturing a piezoelectric device including a support and a piezoelectric single crystal thin film formed on the support, the method comprising the steps of:
implanting an ionized element into a piezoelectric single crystal substrate such that a concentration peak of an implanted element is formed in the piezoelectric single crystal substrate;
forming the support on an ion implantation plane side of the piezoelectric single crystal substrate;
forming a stress layer that causes a surface on a piezoelectric single crystal thin film side of the support to contract; and
isolating some amount of the piezoelectric single crystal substrate at the concentration peak of the implanted element as an isolation plane to form the piezoelectric single crystal thin film on the support.

2. The method according to claim 1 , wherein in the step of forming the stress layer, a compressive stress film that compresses the surface on the piezoelectric single crystal thin film side of the support is formed as the stress layer on a back side of the support, which is opposite to the surface on the piezoelectric single crystal thin film side.

3. The method according to claim 1 , wherein in the step of forming the stress layer, an ion-implanted layer is formed as the stress layer on a back side of the support, which is opposite to the surface on the piezoelectric single crystal thin film side.

4. The method according to claim 1 , wherein
the step of forming the support is carried out after the step of forming the stress layer; and
in the step of forming the stress layer, a tensile stress film that pulls the piezoelectric single crystal thin film is formed as the stress layer on the ion implantation plane side of the piezoelectric single crystal substrate.

5. The method according to claim 1 , further comprising a step of forming an electrode film to form an interdigital terminal electrode film on the piezoelectric single crystal thin film.

6. The method according to claim 1 , further comprising:
a step of forming a sacrificial layer in a space defined to later serve as a void layer existing between the piezoelectric single crystal thin film and the support;
a step of exposing to partially expose the sacrificial layer on a front side of the piezoelectric thin film by etching the piezoelectric crystal thin film to form a hole through the piezoelectric crystal thin film; and
a step of removing the sacrificial layer through the hole.

7. The method according to claim 6 , wherein the stress layer is a compressive stress film located on a back side of the support, which is opposite to the surface on the piezoelectric single crystal thin film side, to compress the surface on the piezoelectric single crystal thin film side of the support.

8. The method according to claim 7 , wherein the compressive stress film is made of silicon oxide, silicon nitride, zinc oxide, tantalum oxide, aluminum nitride, or aluminum oxide.

9. The method according to claim 1 , wherein the stress layer is a tensile stress film arranged between the piezoelectric single crystal thin film and the support so as to pull the piezoelectric single crystal thin film.

10. The method according to claim 9 , wherein the tensile stress film is made of silicon oxide, silicon nitride, aluminum nitride, or aluminum oxide.

11. The method according to claim 1 , wherein the piezoelectric device is one of a plate wave device, a gyroscopic device, an RF switch, and a vibrational electric generator.

Assignees

• Murata Manufacturing Co

Inventors

• Ito Korekiyo

Classifications

• H10P14/3822

  Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing · CPC title

• H03H3/02 Primary

  for the manufacture of piezoelectric or electrostrictive resonators or networks (H03H3/08 takes precedence) · CPC title

• H10N30/057

  by stacking bulk piezoelectric or electrostrictive bodies and electrodes · CPC title

• H10N30/082

  by etching, e.g. lithography · CPC title

• H10N30/508

  adapted for alleviating internal stress, e.g. cracking control layers · CPC title