Graphics library extensions

Patent metadata

Field	Value
Publication number	US-10699464-B2
Application number	US-201615339860-A
Country	US
Kind code	B2
Filing date	Oct 31, 2016
Priority date	Jun 8, 2012
Publication date	Jun 30, 2020
Grant date	Jun 30, 2020

Abstract

Methods for enabling graphics features in processors are described herein. Methods are provided to enable trinary built-in functions in the shader, allow separation of the graphics processor's address space from the requirement that all textures must be physically backed, enable use of a sparse buffer allocated in virtual memory, allow a reference value used for stencil test to be generated and exported from a fragment shader, provide support for use specific operations in the stencil buffers, allow capture of multiple transform feedback streams, allow any combination of streams for rasterization, allow a same set of primitives to be used with multiple transform feedback streams as with a single stream, allow rendering to be directed to layered framebuffer attachments with only a vertex and fragment shader present, and allow geometry to be directed to one of an array of several independent viewport rectangles without a geometry shader.

First claim

What is claimed is:

1. A method for graphics processing, comprising:
processing a single input vertex stream in a single invocation of a geometry shader;
generating multiple transform feedback streams from the single input vertex stream, wherein each transform feedback stream of the multiple transform feedback streams is processed in parallel and each has a different primitive type;
capturing the multiple transform feedback streams as a single stream; and
rasterizing the single stream according to an order in which the multiple transform feedback streams are generated.

2. The method of claim 1 , further comprising:
rendering multiple views based on rasterization of the single stream.

3. The method of claim 2 , wherein:
the input stream comprises input to the geometry shader.

4. The method of claim 1 , wherein:
at least one primitive type of at least one transform stream of the multiple transform feedback streams is a type other than a point type.

5. The method of claim 1 , wherein:
processing performed to generate the input stream is performed only once.

6. The method of claim 5 , wherein:
the processing performed to generate the input stream comprises processing associated with a vertex shader.

7. The method of claim 5 , wherein:
the processing performed to generate the input stream comprises processing associated with a tessellation control shader and a tessellation evaluation shader.

8. A processor, comprising:
a geometry shader configured to:
process a single input vertex stream in a single invocation, and
generate multiple transform feedback streams from the single input vertex stream, wherein each transform feedback stream of the multiple transform feedback streams is processed in parallel and each has a different primitive type,
a feedback module configured to capture the multiple transform feedback streams as a single stream; and
a rasterizer configured to rasterize the single stream according to an order in which the multiple transform feedback streams are generated.

9. The processor of claim 8 , further comprising:
a fragment shader configured to render multiple views based on rasterization of the multiple transform feedback streams for the single input stream.

10. The processor of claim 9 , wherein:
the input stream comprises input to the geometry shader.

11. The processor of claim 8 , wherein:
at least one primitive type of at least one transform stream of the multiple transform feedback streams is a type other than a point type.

12. The processor of claim 8 , wherein:
processing performed to generate the input stream is performed only once.

13. The processor of claim 12 , wherein:
the processing performed to generate the input stream comprises processing associated with a vertex shader.

14. The processor of claim 12 , wherein:
the processing performed to generate the input stream comprises processing associated with a tessellation control shader and a tessellation evaluation shader.

Assignees

• Advanced Micro Devices Inc

Inventors

• Sellers Graham
• Zolnowski Eric
• Boudier Pierre
• Obert Juraj

Classifications

• G06T15/10

  Geometric effects · CPC title

• G06T15/503

  Blending, e.g. for anti-aliasing · CPC title

• G06T15/80

  Shading · CPC title

• G06T11/40

  Filling planar surfaces by adding surface attributes, e.g. adding colours or textures · CPC title

• G06T17/20

  Finite element generation, e.g. wire-frame surface description, {tesselation} · CPC title