Voltage-to-current converter circuit

Patent metadata

Field	Value
Publication number	US-10693477-B1
Application number	US-201916360787-A
Country	US
Kind code	B1
Filing date	Mar 21, 2019
Priority date	Mar 21, 2019
Publication date	Jun 23, 2020
Grant date	Jun 23, 2020

Abstract

An oscillator subsystem included in a phase-locked loop circuit of a computer system may include coarse and fine-tuning circuits. The coarse-tuning circuit may generate a coarse-tuning current based on a reference voltage, and the fine-tuning circuit may generate a fine-tuning current by combining respective currents generated by first and second complement current mirror circuits using a voltage level of a control signal. An oscillator circuit may generate a clock signal whose frequency is based on a combination of the coarse and fine-tuning circuits.

First claim

What is claimed is:

1. An apparatus, comprising:
a coarse-tuning circuit configured to generate, based on a reference voltage level, a coarse-tuning current;
a fine-tuning circuit that includes:
a first current mirror circuit coupled to a power supply signal and configured to mirror a first initial current to generate a first current, wherein the first initial current is generated using a voltage level of a control signal and a first value of a first variable resistor; and
a second current mirror circuit coupled to a ground signal and configured to mirror a second initial current to generate a second current, wherein the second initial current is generated using the voltage level of the control signal and a second value of a second variable resistor;

wherein the fine-tuning circuit is configured to generate a fine-tuning current using the first current and the second current; and
an oscillator circuit configured to generate a clock signal whose frequency is based on a combination of the coarse-tuning current and the fine-tuning current.

2. The apparatus of claim 1 , wherein to generate the fine-tuning current, the fine-tuning circuit is further configured to sum the first current and the second current.

3. The apparatus of claim 1 , wherein to generate the coarse-tuning current, the coarse-tuning circuit is further configured to compare the reference voltage level to a voltage drop across a third variable resistor through which the coarse-tuning current is flowing, wherein the third variable resistor includes the same number of unit cells as the first variable resistor.

4. The apparatus of claim 1 , wherein the second current mirror circuit is a complement of the first current mirror circuit, wherein the first current mirror circuit includes a first device and a second device, and wherein to generate the first current the fine-tuning circuit is further configured to mirror the first initial current based on respective sizes of the first device and the second device.

5. The apparatus of claim 4 , wherein the second current mirror circuit includes a third device and fourth device, and wherein to generate the second current, the fine-tuning circuit is further configured to mirror the second initial current based on respective sizes of the third and fourth devices, and wherein a type of third and fourth devices is different than a type of the first device and the second device.

6. A method, comprising:
generating, based on a voltage level of a control signal, a first current using a first current mirror circuit;
generating, based on the voltage level of the control signal, a second current using a second current mirror circuit that is a complement of the first current mirror circuit;
adjusting the first current using a first variable resistor and adjusting the second current using a second variable resistor;
combining the first current and the second current to generate a fine-tuning current;
generating a coarse-tuning current using a reference voltage level; and
adjusting a frequency of an oscillator circuit using the fine-tuning current and coarse-tuning current.

7. The method of claim 6 , further comprising adjusting the coarse-tuning current using a third variable resistor, wherein a ratio between a value of either the first variable resistor or the second variable resistor and the third variable resistor is constant during adjusting the first, second, and third variable resistors.

8. The method of claim 7 , further comprising, setting, during a calibration operation, respective initial values for the first, second, and third variable resistors.

9. The method of claim 6 , further comprising, generating the control signal based on a comparison of the frequency of the oscillator circuit and a reference signal.

10. The method of claim 6 , further comprising, filtering the control signal.

11. An apparatus, comprising:
an oscillator circuit configured to generate a clock signal whose frequency is based on a voltage level of a control signal;
a phase comparator circuit configured to generate the control signal using the clock signal and a reference signal; and
a control circuit configured to:
generate a first initial current based on the voltage level of the control signal and a first value of a first variable resistor;
mirror the first initial current to generate a first current, wherein a value of the first current is based on respective sizes of a first set of devices included in the control circuit;
generate, based on the voltage level of the control signal, a second current using a second set of devices that are complementary to the first set of devices;
combine the first current and the second current to form a fine-tuning current;
generate a coarse-tuning current using a reference voltage level; and
adjust the voltage level of the control signal using the fine-tuning current and the coarse-tuning current.

12. The apparatus of claim 11 , wherein to generate the second current, the control circuit is further configured to:
generate a second initial current based on the voltage level of the control signal and a second value of a second variable resistor that includes a same number and type of unit cells as the first variable resistor; and
mirror the second initial current to generate the second current whose value is based on respective sizes of devices included in the second set of devices.

13. The apparatus of claim 12 , wherein to combine the first current and the second current, the control circuit is further configured to sum the first current and the second current.

14. The apparatus of claim 12 , wherein the control circuit is further configured to generate, based on a third value of a third variable resistor, the coarse-tuning current using the reference voltage level, wherein the third variable resistor includes the same number and type of unit cells as the first variable resistor.

15. The apparatus of claim 11 , further comprising a filter circuit configured to attenuate frequency components included in the control signal whose respective frequencies are greater a threshold value.

Assignees

• Apple Inc

Inventors

• Marcu Cristian

Classifications

• H03L7/104

  using an additional signal from outside the loop for setting or controlling a parameter in the loop (H03L7/107, H03L7/12 take precedence) · CPC title

• H03L7/099

  concerning mainly the controlled oscillator of the loop · CPC title

• G05F3/262

  using field-effect transistors only · CPC title

• G05F1/561

  Voltage to current converters (amplifiers H03F) · CPC title

• H03F2200/91

  the amplifier has a current mode topology · CPC title