Display apparatus and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-10693016-B2
Application number	US-201715716641-A
Country	US
Kind code	B2
Filing date	Sep 27, 2017
Priority date	Dec 30, 2016
Publication date	Jun 23, 2020
Grant date	Jun 23, 2020

Abstract

A display apparatus includes a thin film transistor on a first base substrate, the thin film transistor including a gate electrode disposed on the first base substrate, an active pattern disposed on the first base substrate and including a semiconductor layer including of amorphous silicon and an ohmic contact layer which is on the semiconductor layer, a drain electrode disposed on the ohmic contact layer and having a first thickness, and a source electrode disposed on the ohmic contact layer and having a second thickness which is greater than the first thickness.

First claim

What is claimed is:

1. A display apparatus, comprising:
a thin film transistor on a first base substrate, the thin film transistor comprising:
a gate electrode disposed on the first base substrate;
an active pattern disposed on the first base substrate, the active pattern comprising:
a semiconductor layer including amorphous silicon, and
a first ohmic contact layer and a second ohmic contact layer disposed on the semiconductor layer;

a drain electrode corresponding to the first ohmic contact layer and spaced apart from the second ohmic contact layer, the drain electrode being a portion of a first conductive layer in contact with the active pattern; and
a source electrode corresponding to the second ohmic contact layer and spaced apart from the first ohmic contact layer, the source electrode being a portion of a second conductive layer different from the first conductive layer and in contact with the active pattern,
wherein
the source electrode has a second thickness which is greater than a first thickness of the drain electrode,
the source electrode comprises a first side surface adjacent to the drain electrode, a second side surface which is opposite to the first side surface, a lower surface facing the active pattern and an upper surface which is opposite to the lower surface,
a width of the upper surface of the source electrode is smaller than a width of the lower surface of the source electrode,
with respect to a normal direction to an upper surface of the first base substrate, the first side surface of the source electrode is inclined at a first inclination angle and the second side surface of the source electrode is inclined at a second inclination angle,
the first inclination angle is greater than the second inclination angle, and
the first side surface is closer to the drain electrode than the second side surface.

2. The display apparatus of claim 1 , wherein
the second ohmic contact layer spaced apart from the drain electrode defines a spacing distance therebetween, and
a width of a channel of the thin film transistor includes the spacing distance.

3. The display apparatus of claim 2 , wherein the width of the channel of the thin film transistor is at least twice the first thickness of the drain electrode.

4. The display apparatus of claim 3 , wherein the width of the channel is about 1 micrometer to about 2 micrometers.

5. The display apparatus of claim 1 , wherein
the first inclination angle is about 60 degrees to about 80 degrees, and
the second inclination angle is about 10 degrees to about 20 degrees.

6. The display apparatus of claim 2 , wherein second thickness of the source electrode is at least 1.2 times the first thickness of the drain electrode.

7. The display apparatus of claim 6 , wherein the first thickness is about 0.5 micrometer to about 1 micrometer.

8. The display apparatus of claim 2 , further comprising:
a first insulation layer disposed between the gate electrode and the active pattern;
a second insulation layer disposed on the drain electrode;
a pixel electrode disposed on the second insulation layer, the pixel electrode electrically connected to the drain electrode through a contact hole in the second insulation layer;
a gate line electrically connected to the gate electrode; and
a data line electrically connected to the source electrode,
wherein a thickness of the data line defines the second thickness of the source electrode.

9. The display apparatus of claim 1 , wherein
the semiconductor layer comprises a first end and a second end opposite to each other,
the drain electrode comprise a first outer side surface which is furthest from the source electrode and aligned with the first end of the semiconductor layer,
the source electrode comprises a second outer side surface which is furthest from the drain electrode and aligned with the second end of the semiconductor layer,
the drain electrode for which the first outer side surface thereof is aligned with the first end of the semiconductor layer, is a portion of the first conductive layer which is in contact with the active pattern and has the first thickness, and
the source electrode for which the second outer side surface thereof is aligned with the second end of the semiconductor layer, is a portion of the second conductive layer which is different from the first conductive layer, is in contact with the active pattern and has the second thickness which is greater than the first thickness.

Assignees

• Samsung Display Co Ltd

Inventors

• Hong Pil Soon
• Jung Hyunyoung
• PARK Chulwon
• Park Gwui-Hyun
• Park Jeongmin

Classifications

• H10D30/6757 Primary

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D30/0321

  comprising silicon, e.g. amorphous silicon or polysilicon · CPC title

• H10D30/6713

  characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes · CPC title

• H10D86/441 Primary

  Interconnections, e.g. scanning lines · CPC title

• H10D86/0231

  using masks, e.g. half-tone masks · CPC title