Display device and method for adjusting common voltage of display device

Patent metadata

Field	Value
Publication number	US-10692462-B2
Application number	US-201815919905-A
Country	US
Kind code	B2
Filing date	Mar 13, 2018
Priority date	Mar 17, 2017
Publication date	Jun 23, 2020
Grant date	Jun 23, 2020

Abstract

According to an aspect, a display device includes a common voltage adjuster configured to adjust a common voltage based on a first capacitance value between one of a source and a drain of a transistor element and a gate of the transistor element, a second capacitance value between a pixel electrode and the gate of the transistor element, and a third capacitance value between the pixel electrode and a common electrode.

First claim

What is claimed is:

1. A display device comprising:
a plurality of pixels provided in a display area of a display unit that displays images, the pixels each including a transistor element;
a plurality of signal lines, one of a source and a drain of each transistor element being coupled to a corresponding one of the signal lines;
a plurality of scanning lines, a gate of the transistor element being coupled to a corresponding one of the scanning lines;
a plurality of pixel electrodes, the other of the source and the drain of the transistor element being coupled to a corresponding one of the pixel electrodes; and
a common electrode driver that applies a common voltage to a common electrode,
wherein the display device is configured to perform display operation by an inversion driving method that inverts, at a certain cycle, pixel signals to be written into the pixels via the signal lines,
wherein the display device further comprises a common voltage adjuster configured to adjust the common voltage based on a first capacitance value between one of the source and the drain of the transistor element and the gate of the transistor element, a second capacitance value between the pixel electrode and the gate of the transistor element, and a third capacitance value between the pixel electrode and the common electrode, and
wherein the common voltage adjuster comprising a detector configured to detect the first capacitance value, the second capacitance value, and the third capacitance value.

2. A display device comprising:
a plurality of pixels provided in a display area of a display unit that displays images, the pixels each including a transistor element;
a plurality of signal lines, one of a source and a drain of each transistor element being coupled to a corresponding one of the signal lines;
a plurality of scanning lines, a gate of the transistor element being coupled to a corresponding one of the scanning lines;
a plurality of pixel electrodes, the other of the source and the drain of the transistor element being coupled to a corresponding one of the pixel electrodes; and
a common electrode driver that applies a common voltage to a common electrode,
wherein the display device is configured to perform display operation by an inversion driving method that inverts, at a certain cycle, pixel signals to be written into the pixels via the signal lines,
wherein the display device further comprises a common voltage adjuster configured to adjust the common voltage based on a first capacitance value between one of the source and the drain of the transistor element and the gate of the transistor element, a second capacitance value between the pixel electrode and the gate of the transistor element, and a third capacitance value between the pixel electrode and the common electrode, and
wherein the common voltage adjuster
calculates a parallel capacitance value of the first capacitance value and the second capacitance value when the transistor element is in a conducting state and
calculates the first capacitance value and a series capacitance value of the second capacitance value and the third capacitance value when the transistor element is in a non-conducting state.

3. The display device according to claim 2 ,
wherein the common voltage adjuster calculates the second capacitance value using Equation (1):
C 2= C 12− C 1  (1)

where C 2 is the second capacitance value, C 12 is the parallel capacitance value, and C 1 is the first capacitance value.

4. The display device according to claim 3 ,
wherein the common voltage adjuster calculates the third capacitance value using Equation (2):
C 3= C 2× C 23/( C 2− C 23)  (2)

where C 3 is the third capacitance value, and C 23 is the series capacitance value.

5. The display device according to claim 4 ,
wherein the common voltage adjuster adjusts the common voltage in accordance with a penetration voltage calculated using Equation (3):
Δ Vp =( C 2/( C 2+ C 3))× Vg   (3)

where ΔVp is the penetration voltage, and Vg is a wave height value of a vertical scanning pulse signal to be applied to the gate of the transistor element at the display operation.

6. The display device according to claim 5 ,
wherein the common voltage adjuster subtracts an offset voltage Voft depending on the penetration voltage ΔVp from an initial value Vcomset of the common voltage set in advance.

7. A display device comprising:
a plurality of pixels provided in a display area of a display unit that displays images, the pixels each including a transistor element;
a plurality of signal lines, one of a source and a drain of each transistor element being coupled to a corresponding one of the signal lines;
a plurality of scanning lines, a gate of the transistor element being coupled to a corresponding one of the scanning lines;
a plurality of pixel electrodes, the other of the source and the drain of the transistor element being coupled to a corresponding one of the pixel electrodes; and
a common electrode driver that applies a common voltage to a common electrode,
wherein the display device is configured to perform display operation by an inversion driving method that inverts, at a certain cycle, pixel signals to be written into the pixels via the signal lines, and
wherein the display device further comprises a common voltage adjuster configured to adjust the common voltage based on a first capacitance value between one of the source and the drain of the transistor element and the gate of the transistor element, a second capacitance value between the pixel electrode and the gate of the transistor element, and a third capacitance value between the pixel electrode and the common electrode,
wherein the pixels are arranged in a matrix of M rows×N columns in the display area, each of M and N being a natural number,
wherein the gates of the transistor elements of N pixels included in one row are coupled to one of the scanning lines,
wherein, when the transistor element of each of N pixels included in one row is in a conducting state, the common voltage adjuster calculates a total capacitance value of the parallel capacitance values of N pixels, each of which is the parallel capacitance value of the first capacitance value and the second capacitance value of the transistor element, and
wherein, when the transistor element of each of N pixels included in one row is in a non-conducting state, the common voltage adjuster calculates a total capacitance value of the first capacitance values of the transistor elements of N pixels and calculates a total capacitance value of the series capacitance values of N pixels, each of which is the series capacitance value of the second capacitance value and the third capacitance value of the transistor element.

8. The display device according to claim 7 ,
wherein the common voltage adjuster calculates a total capacitance value of the second capacitance values of the transistor elements of N pixels using Equation (4):
N×C 2= N×C 12− N×C 1  (4)

where N×C 2 is the total capacitance value of the second capacitance values, N×C 12 is the total capacitance value of the parallel capacitance values, and N×C 1 is the total capacitance value of the first capacitance values.

9. The display device according to claim 8 ,
wherein the common voltage adjuster calculates a total capacitance value of the third capacitance values of N pixels using Equation (5):
N×C 3= N×C 2× N×C 23/( N×C 2− N×C 23)  (5)

where N×C 3 is the total capacitance value of the third capacitance values, and N×C 23 is the total capacitance value of the series capacitance values.

10. The display device according to claim 9 ,
wherein the common voltage

Assignees

• Japan Display Inc

Inventors

• Imai Ryo

Classifications

• G09G3/3655

  Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors · CPC title

• G09G3/006

  Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309) · CPC title

• G09G3/3696 Primary

  Generation of voltages supplied to electrode drivers · CPC title

• G09G3/3614

  Control of polarity reversal in general · CPC title

• G09G3/3677

  suitable for active matrices only · CPC title