Display driving circuit, method for controlling the same, and display apparatus

US10692460B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10692460-B2
Application numberUS-201816320070-A
CountryUS
Kind codeB2
Filing dateMar 8, 2018
Priority dateJun 5, 2017
Publication dateJun 23, 2020
Grant dateJun 23, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of the present application provide a display driving circuit, a method for controlling the same, and a display apparatus. The display driving circuit includes a plurality of function multiplexing circuits, and each of the plurality of function multiplexing circuits includes a data transmission terminal, an enabling signal terminal, a first signal terminal and a second signal terminal, and is configured to provide a test signal to the data transmission terminal and release static electricity at the data transmission terminal through the first signal terminal or the second signal terminal under control of the enabling signal terminal, the first signal terminal, and the second signal terminal, wherein the data transmission terminal is configured to be connected to at least one data line.

First claim

Opening claim text (preview).

We claim: 1. A display driving circuit, comprising a plurality of function multiplexing circuits, wherein each of the plurality of function multiplexing circuits comprises-a data transmission terminal, an enabling signal terminal, a first signal terminal and a second signal terminal, and is configured to provide a test signal to the data transmission terminal and release static electricity at the data transmission terminal through the first signal terminal or the second signal terminal under control of signals at the enabling signal terminal, the first signal terminal, and the second signal terminal, wherein the data transmission terminal is configured to be connected to at least one data line in a display panel, and wherein each function multiplexing circuit comprises a first multiplexing sub-circuit and a second multiplexing sub-circuit, wherein: the first multiplexing sub-circuit is connected to the enabling signal terminal, the first signal terminal, and the data transmission terminal, and is configured to input the signal at the first signal terminal to the data transmission terminal and release the static electricity at the data transmission terminal through the first signal terminal under control of the signals at the enabling signal terminal and the first signal terminal; and the second multiplexing sub-circuit is connected to the second signal terminal and the data transmission terminal, and is configured to stabilize a voltage at the data transmission terminal and release the static electricity at the data transmission terminal through the second signal terminal under control of the second signal terminal and the data transmission terminal. 2. The display driving circuit according to claim 1 , wherein the first multiplexing sub-circuit comprises a first transistor, wherein the first transistor has a gate connected to the enabling signal terminal, a first electrode connected to the data transmission terminal, and a second electrode connected to the first signal terminal. 3. The display driving circuit according to claim 1 , wherein the second multiplexing sub-circuit comprises a second transistor, wherein the second transistor has a gate and a first electrode connected to the data transmission terminal, and a second electrode connected to the second signal terminal. 4. The display driving circuit according to claim 1 , further comprising a multiplexer, wherein the multiplexer is connected to gating control terminals, the at least one data line, and the data transmission terminals of the plurality of function multiplexing circuits, and is configured to output a signal at each of the data transmission terminals to a respective one of the at least one data line under control of gating signals at the gating control terminals. 5. The display driving circuit according to claim 1 , further comprising: a source driver connected to the data transmission terminals of the plurality of function multiplexing circuits, and configured to provide a data signal to the data transmission terminals. 6. A display apparatus, comprising the display driving circuit according to claim 1 . 7. A method for controlling the display driving circuit according to claim 1 , the method comprising: for each of the plurality of function multiplexing circuits, in a test phase, controlling, by using signals at the enabling signal terminal, the first signal terminal, and the second signal terminal, the function multiplexing circuit to provide a test signal to the data transmission terminal; and in an electrostatic protection phase, controlling, by using signals at the enabling signal terminal, the first signal terminal, and the second signal terminal, the function multiplexing circuit to release static electricity at the data transmission terminal through the first signal terminal or the second signal terminal. 8. The method according to claim 7 , wherein: each function multiplexing circuit comprises a first multiplexing sub-circuit and a second multiplexing sub-circuit; controlling the function multiplexing circuit to provide a test signal to the data transmission terminal comprises: controlling, by using the signals at the enabling signal terminal and the first signal terminal, the first multiplexing sub-circuit to input a signal at the first signal terminal to the data transmission terminal as a test signal, and controlling, by using the signals at the second signal terminal and the data transmission terminal, the second multiplexing sub-circuit to stabilize a voltage at the data transmission terminal; and controlling the function multiplexing circuit to release static electricity at the data transmission terminal through the first signal terminal or the second signal terminal comprises: controlling, by using the signal at the enabling signal terminal and the first signal terminal, the first multiplexing sub-circuit to release static electricity at the data transmission terminal through the first signal terminal, and controlling, by using the signals at the second signal terminal and the data transmission terminal, the second multiplexing sub-circuit to release the static electricity at the data transmission terminal through the second signal terminal. 9. The method according to claim 7 , wherein the plurality of function multiplexing circuits comprise at least one group of two function multiplexing circuits, one of which is a first function multiplexing circuit and the other of which is a second function multiplexing circuit, and wherein controlling each function multiplexing circuit to provide a test signal to the data transmission terminal comprises: for a first image frame, applying a first level to the first signal terminal, and applying a second level to the first signal terminal of the second function multiplexing circuit; and for a second image frame, applying a second level to the first signal terminal of the first function multiplexing circuit, and applying a first level to the first signal terminal of the second function multiplexing circuit. 10. The display driving circuit according to claim 2 , wherein the second multiplexing sub-circuit comprises a second transistor, wherein the second transistor has a gate and a first electrode connected to the data transmission terminal, and a second electrode connected to the second signal terminal. 11. The display driving circuit according to claim 4 , wherein the plurality of function multiplexing circuits comprise at least one group of two function multiplexing circuits, one of which is a first function multiplexing circuit and the other of which is a second function multiplexing circuit; and the multiplexer comprises a plurality of gating sub-circuits, each connected to a respective one of the at least one group and respective L data line(s) of the at least one data line, wherein each of the gating sub-circuits comprises L gating device(s), wherein odd-numbered one(s) of the L gating device(s) is(are) connected to the first function multiplexing circuits and odd-numbered one(s) of the L data line(s), and even-numbered one(s) of the L gating devices is(are) connected to the second function multiplexing circuits and even-numbered one(s) of the L data line(s), where L is a positive integer. 12. The display apparatus according to claim 11 , wherein the display apparatus has a plurality of layout areas, and the plurality of function multiplexing circuits are located in one of the plurality of layout areas. 13. The method according to claim 8 , wherein the first multiplexing sub-circuit comprises a first transistor, and controlling the first multiplexing sub-circuit to release static electricity at the data transmission

Assignees

Inventors

Classifications

  • G09G3/006Primary

    Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309) · CPC title

  • G09G3/36Primary

    using liquid crystals · CPC title

  • Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns · CPC title

  • Display protection · CPC title

  • G09G3/3688Primary

    suitable for active matrices only · CPC title

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Frequently asked questions

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What does patent US10692460B2 cover?
Embodiments of the present application provide a display driving circuit, a method for controlling the same, and a display apparatus. The display driving circuit includes a plurality of function multiplexing circuits, and each of the plurality of function multiplexing circuits includes a data transmission terminal, an enabling signal terminal, a first signal terminal and a second signal termina…
Who is the assignee on this patent?
Ordos Yuansheng Optoelectronics Co Ltd, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/006. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 23 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).