Analog processor comprising quantum devices

Patent metadata

Field	Value
Publication number	US-10691633-B2
Application number	US-201916421211-A
Country	US
Kind code	B2
Filing date	May 23, 2019
Priority date	Dec 23, 2004
Publication date	Jun 23, 2020
Grant date	Jun 23, 2020

Abstract

Methods and systems for solving various computational problems with quantum processors are provided. Such quantum processors comprise a plurality of quantum devices together with a plurality of coupling devices. The quantum processor is initialized by setting states of the quantum devices and coupling devices and allowed to evolve to a final state which approximates a natural ground state of the computational problem. The final state can include values of nodes arranged in a lattice in the quantum processor and can represent a solution to the computational processor. The computational problem can have complexity P, NP, NP-Hard, or NP-Complete and may be mapped to a quantum processor with nearest-neighbor and next-nearest-neighbor couplings. The solution to the computational problem can be read out from the quantum processor and transmitted as a data signal embodied in a carrier wave.

First claim

We claim:

1. A method of determining a result for a computational problem using a quantum processor, the method comprising:
(i) initializing the quantum processor to an initial state, wherein the quantum processor comprises a plurality of quantum devices and a plurality of coupling devices, and wherein each coupling device in the plurality of coupling devices couples a pair of quantum devices in the plurality of quantum devices, wherein initializing the quantum processor comprises setting a state of at least one of the quantum devices in the plurality of quantum devices and setting a coupling strength of at least one of the coupling devices in the plurality of coupling devices;
(ii) allowing the quantum processor to evolve to a final state wherein the final state approximates a natural ground state of the computational problem;
(iii) reading out a final state of at least one quantum device in the plurality of quantum devices thereby determining the result for the computational problem; and
(iv) generating a carrier wave embodying a data signal comprising the result of the computational problem.

2. The method of claim 1 , wherein generating a carrier wave embodying a data signal comprising the result of the computational problem includes generating a carrier wave embodying a data signal comprising a respective value for each node in a plurality of nodes;
wherein the plurality of nodes are at least two nodes in a lattice of nodes in the quantum processor, and wherein each node in the lattice of nodes is a quantum device in the plurality of quantum devices; and
wherein a value of at least one node in the plurality of nodes individually or collectively represents a solution to the computational problem that has been solved by evolving the quantum processor at a time after a graph representing the computational problem has been mapped onto at least a portion of the lattice.

3. The method of claim 2 , wherein the computational problem is selected from the group consisting of a problem having a complexity of P, a problem having a complexity of NP, a problem having a complexity of NP-Hard, and a problem having a complexity of NP-Complete.

4. The method of claim 2 , wherein the plurality of nodes comprises at least 16 nodes.

5. The method of claim 2 , wherein the respective value of a node in the plurality of nodes is a binary value.

6. The method of claim 2 , wherein the graph is selected from the group consisting of K 5 , K 3,3 , an expansion of Ks, and an expansion of K 3,3 .

7. A computer system, comprising:
means for inputting a computational problem to be solved, wherein the computational problem is selected from the group consisting of a problem having a complexity of P, a problem having a complexity of NP, a problem having a complexity of NP-Hard, and a problem having a complexity of NP-Complete;
means for mapping the computational problem onto a quantum processor, wherein the quantum processor comprises qubit means and means for coupling nearest-neighbor and next-nearest neighbor qubit means;
means for obtaining a solution to the computational problem using the quantum processor;
means for outputting the solution of the computational problem; and
means for transmitting the solution as a data signal embodied in a carrier wave.

Assignees

• D Wave Systems Inc

Inventors

• Maassen Van Den Brink Alexander
• Love Peter
• Amin Mohammad H S
• Rose Geordie
• Grant David
• Steininger Miles F H
• Bunyk Paul I
• Berkley Andrew J

Classifications

• G06N10/40

  Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control · CPC title

• G06N5/01 Primary

  Dynamic search techniques; Heuristics; Dynamic trees; Branch-and-bound · CPC title

• G06G7/12

  Arrangements for performing computing operations, e.g. {operational} amplifiers specially adapted therefor · CPC title

• G06J3/00 Primary

  Systems for conjoint operation of complete digital and complete analogue computers · CPC title

• B82Y10/00

  Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic · CPC title