Memory operand descriptors

Patent metadata

Field	Value
Publication number	US-10684891-B2
Application number	US-201615209492-A
Country	US
Kind code	B2
Filing date	Jul 13, 2016
Priority date	Mar 11, 2016
Publication date	Jun 16, 2020
Grant date	Jun 16, 2020

Abstract

A system according to an exemplary embodiment receives an operand descriptor identifying characteristics of a set of data elements referenced by an operand to be accessed from a set of locations in a memory, wherein the operand descriptor describes an ordering of the set of data elements and respective locations in the memory for each respective data element in the set of data elements. The system further accesses the set of data elements in the memory based on the operand descriptor.

First claim

What is claimed is:

1. A system comprising:
a processor; and
memory coupled to the processor and storing instructions that, when executed by the processor, cause the system to perform operations comprising:
receiving, by a software component operating on the system, an operand descriptor identifying characteristics of a set of data elements referenced by an operand to be accessed from a set of locations in a memory, wherein the operand descriptor describes an ordering of the set of data elements and respective locations in the memory for each respective data element in the set of data elements, and wherein the operand descriptor includes one or more of: a base address, an access type, an element size, a data collection rank, a type of descriptor, a marshalling function, a sequence of rank dimension indices that specifies a rank-traversal order, and a physical layout and traversal order of each dimension in the memory comprising one or more of: a number of elements at a rank in the memory, a lower index within memory to be copied, a number of contiguous elements per stride, a number of elements within boundaries between block starts, a number of blocks to copy, a lowest index in a rank at which elements occur, and a highest index in rank at which elements occur; and
accessing, by the software component, the set of data elements in the memory based on the operand descriptor,
wherein receiving the operand descriptor includes receiving a source operand descriptor and a destination operand descriptor, wherein the source operand descriptor and the destination operand descriptor have characteristics that one or more of:
differ in physical layout, and
differ in traversal order; and

wherein accessing the set of data elements in the memory includes:
reading the set of data elements from memory and generating an ordered sequence of the data elements based on the source operand descriptor; and
writing the data elements to memory based on the destination operand descriptor and the generated ordered sequence of the data elements, and

wherein data elements are transposed, by reversing values in the sequence of rank dimension indices specifying the rank-traversal order index across dimensions, such that dimensions described by the descriptors are traversed in an alternate order.

2. The system of claim 1 , wherein accessing the set of data elements in the memory includes reading the set of data elements from memory and generating an ordered sequence of the data elements based on the operand descriptor.

3. The system of claim 1 , wherein accessing the set of data elements in the memory includes writing the data elements to memory based on the operand descriptor and an ordered sequence of the data elements.

4. The system of claim 1 , wherein the source operand descriptor and the destination operand descriptor differ in the physical layout and wherein accessing the memory includes identifying a physical data layout for the data elements where a physical layout for the data elements read from the memory is different from a physical data layout of the data elements written to the memory.

5. The system of claim 4 , wherein starting location for data elements read from the memory is different from a starting location for data elements written to the memory.

6. The system of claim 4 , wherein the source operand descriptor and the destination operand descriptor differ in a location at which data in a next-outer dimension begins via a change to a size of the next-outer dimension.

7. The method of claim 1 , wherein the source operand descriptor and the destination operand descriptor differ in the traversal order and wherein accessing the memory includes identifying a traversal order for the data elements where a traversal order for elements read from the memory is different from a traversal order of the data elements written to the memory.

8. The system of claim 1 , wherein data is projected to a higher or lower number of dimensions.

9. The system of claim 1 , wherein data is skewed within one or more dimensions.

10. The system of claim 1 , wherein the operand is for one or more of: a computation action, a data transfer action, and a synchronization action.

11. The system of claim 1 , wherein the software component includes:
a marshalling function for interpreting a source operand descriptor reading the data elements in their physical layout and creating a serialized sequence of elements; and
a recursive function that is called by the marshalling function and interprets the descriptor to visit locations in memory in a specified order and read the data elements from the memory.

12. The system of claim 1 , wherein the software component includes:
a demarshalling function for interpreting a destination operand descriptor and writing a serialized sequence of data elements into a destination physical layout in a prescribed order; and
a recursive function that is called by the demarshalling function and interprets the descriptor to visit locations in memory in a specified order and write the data elements to the memory.

13. The system of claim 1 , wherein the software component includes:
a marshalling function for interpreting a source operand descriptor for reading the data elements in their physical layout and creating a serialized sequence of elements;
a demarshalling function for interpreting a destination operand descriptor and writing a serialized sequence of data elements into a destination physical layout in a prescribed order; and
a recursive function that is called by the marshalling function and demarshalling function and interprets the descriptor to visit locations in memory in a specified order and either reads the data elements from the memory or writes the data elements to the memory.

14. The system of claim 1 , wherein the memory further stores instructions for:
receiving, by the software component, an optimized function for acting on one or more of: the operand descriptor and the data elements.

15. A computer implemented method comprising:
receiving, by a software component operating on a computer system, an operand descriptor identifying characteristics of a set of data elements referenced by an operand to be accessed from a set of locations in a memory, wherein the operand descriptor describes an ordering of the set of data elements and respective locations in the memory for each respective data element in the set of data elements, and wherein the operand descriptor includes one or more of: a base address, an access type, an element size, a data collection rank, a type of descriptor, a marshalling function, a sequence of rank dimension indices that specifies a rank-traversal order, and a physical layout and traversal order of each dimension in the memory comprising one or more of: a number of elements at a rank in the memory, a lower index within memory to be copied, a number of contiguous elements per stride, a number of elements within boundaries between block starts, a number of blocks to copy, a lowest index in a rank at which elements occur, and a highest index in rank at which elements occur; and
accessing, by the software component, the set of data elements in the memory based on the operand descriptor,
wherein receiving the operand descriptor includes receiving a source operand descriptor and a destination operand descriptor, wherein the source operand descriptor and the destination operand descriptor have characteristics that one or more of:
differ in physical layout, and
differ in traversal order; and

wherein accessing the set of data elements in the memory includes:
reading the set of data ele

Assignees

• Newburn Chris
• Intel Corp

Inventors

• Newburn Chris

Classifications

• G06F9/4881 Primary

  Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues · CPC title

• G06F2209/484

  Precedence · CPC title