Eddy current inspection instrument with noise shaping filter

Patent metadata

Field	Value
Publication number	US-10684258-B2
Application number	US-201715581018-A
Country	US
Kind code	B2
Filing date	Apr 28, 2017
Priority date	Apr 28, 2016
Publication date	Jun 16, 2020
Grant date	Jun 16, 2020

Abstract

Quantization noise in an oversampled eddy current digital drive circuit is reduced using a noise shaping filter.

First claim

What is claimed is:

1. A noise reduction circuit for non-destructive testing (NDT) of a test object with a NDT probe, the circuit comprising:
a direct digital synthesizer (DDS);
a noise shaping filter;
a digital-to-analog converter (DAC);
an analog filter; and
amplifier;
wherein the (DDS) is configured to produce a digital waveform having a periodic excitation frequency and having a number of bits equal to the sum of a first number of bits of the DAC and a second number of bits of the DDS;
wherein the noise shaping filter is configured to produce a digital shaped output having a number of bits equal to the number of bits of the DAC according to the digital waveform and to shape a noise frequency distribution so that a first noise power corresponding to the excitation frequency is smaller than a second noise power corresponding to frequencies greater than the excitation frequency;
wherein the (DAC) is configured to sample the digital shaped output at a sampling frequency and to produce an analog shaped output having a quantization noise power distributed according to the noise frequency distribution;
wherein the analog filter is configured to produce an analog filtered output by removing from the analog shaped output signals having a frequency greater than a filter bandwidth; and
wherein the amplifier is configured to amplify the analog filtered output to produce an amplified analog filtered output.

2. The circuit of claim 1 wherein the NDT probe is an eddy current probe.

3. The circuit of claim 1 wherein the amplified analog filtered output is a drive signal for the NDT probe.

4. The circuit of claim 1 wherein the amplifier comprises a pre-amplifier and a power amplifier.

5. The circuit of claim 1 wherein the digital waveform is a sine waveform.

6. The circuit of claim 1 wherein the DAC is a 12-bit converter and the DDS is a 20-bit synthesizer.

7. The circuit of claim 1 wherein the sampling frequency is greater than twice the excitation frequency.

8. The circuit of claim 1 wherein the sampling frequency is greater than one hundred times the excitation frequency.

9. A method of reducing noise in a circuit for non-destructive testing (NDT) of a test object with a NDT probe, the method comprising the steps of:
producing a digital waveform having a periodic excitation frequency and having a number of bits equal to the sum of a first number of bits of a digital-to-analog converter (DAC) and a second number of bits of a direct digital synthesizer (DDS);
shaping a noise frequency distribution of the digital waveform as a digital shaped output having a number of bits equal to the number of bits of the DAC according to the digital waveform and to shape a noise frequency distribution so that a first noise power corresponding to the excitation frequency is smaller than a second noise power corresponding to frequencies greater than the excitation frequency;
converting the digital shaped output at a sampling frequency to an analog shaped output having a quantization noise power distributed according to the noise frequency distribution;
filtering the analog shaped output to produce an analog filtered output by removing from the analog shaped output signals having a frequency greater than a filter bandwidth; and
amplifying the analog filtered output to produce an amplified analog filtered output.

10. The method of claim 9 wherein the NDT probe is an eddy current probe.

11. The method of claim 9 wherein the amplified analog filtered output is a drive signal for the NDT probe.

12. The method of claim 9 wherein amplifying the analog filtered output to produce an amplified analog filtered output comprises pre-amplification and amplification.

13. The method of claim 9 wherein the digital output waveform is a sine waveform.

14. The method of claim 9 wherein the DAC is a 12-bit converter and the DDS is a 20-bit synthesizer.

15. The method of claim 9 wherein the sampling frequency is greater twice the excitation frequency.

16. The method of claim 9 wherein the sampling frequency is greater than one hundred times the excitation frequency.

Assignees

• Couillard Benjamin
• Olympus Scient Solutions Americas Inc

Inventors

• Couillard Benjamin

Classifications

• H04B3/30

  Reducing interference caused by unbalanced currents in a normally balanced line · CPC title

• H03L7/081

  provided with an additional controlled phase shifter {(H03L7/0998 takes precedence)} · CPC title

• H04L25/4917

  using multilevel codes · CPC title

• G01N27/9046 Primary

  by analysing electrical signals · CPC title

• G01R25/00

  Arrangements for measuring phase angle between a voltage and a current or between voltages or currents · CPC title