Techniques and circuits for time-interleaved injection locked voltage controlled oscillators with jitter accumulation reset

Patent metadata

Field	Value
Publication number	US-10680585-B2
Application number	US-201815947924-A
Country	US
Kind code	B2
Filing date	Apr 9, 2018
Priority date	Apr 9, 2018
Publication date	Jun 9, 2020
Grant date	Jun 9, 2020

Abstract

Digital jitter accumulation reduction techniques and circuits are proposed to mitigate jitter accumulation in Voltage Controlled Oscillators (VCOs). In order to reduce jitter accumulation, employing a pair of identical injection locked VCOs is proposed in an interleaved fashion. Further jitter accumulation reductions can be provided by employing a plurality of identical injection locked VCOs selected in a cascading fashion. Yet further jitter accumulation reductions can be provided by resetting the deselected VCO(s).

First claim

What is claimed is:

1. A Voltage Controlled Oscillator (VCO) circuit, the circuit comprising:
a plurality of VCO branch circuits, each VCO branch circuit employing a reference clock signal to provide a VCO output signal;
a multiplexer configured to output one of the plurality of VCO output signals; and
a control circuit configured to cause the multiplexer to select the plurality of VCO branch circuits in a round robin fashion to output the VCO output signal provided by each VCO branch circuit one at a time, the control circuit further configured to actuate at least one switch to turn off a VCO component in at least one deselected VCO branch circuit,
wherein accumulated jitter increases over time after each VCO branch circuit is turned on, and wherein the round robin selection operation and the turn off operation of the control circuit limits jitter accumulation at an output of the multiplexer.

2. A circuit as claimed in claim 1 , wherein the plurality of VCO branch circuits comprise identical VCO components manufactured on one wafer.

3. A circuit as claimed in claim 1 , wherein each VCO branch circuit comprises an injection locked system including a corresponding driver configured to inject the reference clock signal into the corresponding injection locked system, wherein identical driver components are manufactured on the one wafer.

4. A circuit as claimed in claim 1 comprising a pair of VCO branch circuits wherein round robin selection interleaves the outputs of the pair of VCO branch circuits.

5. A circuit as claimed in claim 3 , wherein each injection locked system comprises a ring oscillator including a corresponding switch of the at least one switch and a plurality of inverters, and the control circuit is configured to actuate the corresponding switch to turn off the corresponding VCO in a deselected VCO branch.

6. A circuit as claimed in claim 3 , wherein each VCO branch circuit further comprises a reset switch configured to inject a reset signal into the corresponding injection locked system after oscillation in the corresponding VCO branch circuit is turned off, to flush accumulated jitter in the injection locked system.

7. A transceiver comprising:
a pulse generator providing a reference clock signal including a train of pulses at a common reference clock frequency;
a plurality of Voltage Controlled Oscillator (VCO) branch circuits, each VCO branch circuit employing the reference clock signal to provide a VCO output signal;
a multiplexer configured to output one of the plurality of VCO output signals; and
a control circuit configured to cause the multiplexer to select the plurality of VCO branch circuits in a round robin fashion to output the VCO output signal provided by each VCO branch circuit one at a time, the control circuit further configured to actuate at least one switch to turn off a VCO component in at least one deselected VCO branch circuit,
wherein accumulated jitter increases over time after each VCO branch circuit is turned on, and wherein the round robin selection operation and the turn off operation of the control circuit limits jitter accumulation at an output of the multiplexer.

8. A transceiver as claimed in claim 7 , wherein the plurality of VCO branch circuits comprise identical VCO components manufactured on one wafer.

9. A transceiver as claimed in claim 7 , wherein each VCO branch circuit comprises an injection locked system including a corresponding driver configured to inject the reference clock signal into the corresponding injection locked system, wherein identical driver components are manufactured on the one wafer.

10. A transceiver as claimed in claim 9 , wherein each injection locked system comprises a ring oscillator including a corresponding switch of the at least one switch and a plurality of inverters, and the control circuit is configured to actuate the corresponding switch to turn off the corresponding VCO in a deselected VCO branch.

11. A transceiver as claimed in claim 9 , wherein each VCO branch circuit further comprises a reset switch configured to inject a reset signal into the corresponding injection locked system after oscillation in the corresponding VCO branch circuit is turned off, to flush accumulated jitter in the injection locked system.

12. A transceiver as claimed in claim 7 , comprising a pair of VCO branch circuits wherein round robin selection interleaves the outputs of the pair of VCO branch circuits.

13. A method of operating Voltage Controlled Oscillator (VCO) circuit, the method comprising:
injecting a reference clock signal into a plurality of VCO branch circuits, each VCO branch circuit employing the reference clock signal to provide a corresponding VCO output signal; and
selecting the VCO output signal of each VCO branch circuit in a round robin fashion via a multiplexer and turning off a VCO component in at least one deselected VCO branch circuit, the multiplexer being configured to output the selected VCO output signal,
wherein accumulated jitter increases over time after each VCO branch circuit is turned on, and wherein jitter accumulation is limited via the round robin selection operation and turn off operation.

14. A method as claimed in claim 13 , wherein each VCO branch circuit comprises an injection locked system including a corresponding driver, the method comprising injecting the reference clock signal into the corresponding injection locked system.

15. A method as claimed in claim 14 , wherein each injection locked system comprises a ring oscillator including a switch and a plurality of inverters, the method further comprises actuating the switch to turn off the corresponding VCO in a deselected VCO branch.

16. A method as claimed in claim 14 , wherein each VCO branch circuit further comprises a reset switch, the method comprising injecting a reset signal into the corresponding injection locked system after oscillation in the corresponding VCO branch circuit is turned off to flush accumulated jitter in the injection locked system.

17. A method as claimed in claim 13 comprising a pair of VCO branch circuits wherein round robin selection interleaves the outputs of the pair of VCO branch circuits.

Assignees

• Ciena Corp

Inventors

• Aouini Sadok
• Ben-Hamida Naim
• Parvizi Mahdi

Classifications

• G01R29/26

  Measuring noise figure; Measuring signal-to-noise ratio · CPC title

• H03K3/013 Primary

  Modifications of generator to prevent operation by noise or interference · CPC title

• H03L7/0995

  the oscillator comprising a ring oscillator · CPC title

• H03L7/083

  the reference signal being additionally directly applied to the generator · CPC title

• H03B2201/02

  Varying the frequency of the oscillations by electronic means · CPC title